Mercurial > hg > CbC > CbC_gcc
annotate gcc/caller-save.c @ 88:f214c1d5b862
merge 89
| author | Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> |
|---|---|
| date | Tue, 20 Dec 2011 18:53:46 +0900 |
| parents | f6334be47118 |
| children | 04ced10e8804 |
| rev | line source |
|---|---|
| 0 | 1 /* Save and restore call-clobbered registers which are live across a call. |
| 2 Copyright (C) 1989, 1992, 1994, 1995, 1997, 1998, 1999, 2000, | |
|
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3 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 |
| 0 | 4 Free Software Foundation, Inc. |
| 5 | |
| 6 This file is part of GCC. | |
| 7 | |
| 8 GCC is free software; you can redistribute it and/or modify it under | |
| 9 the terms of the GNU General Public License as published by the Free | |
| 10 Software Foundation; either version 3, or (at your option) any later | |
| 11 version. | |
| 12 | |
| 13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY | |
| 14 WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 16 for more details. | |
| 17 | |
| 18 You should have received a copy of the GNU General Public License | |
| 19 along with GCC; see the file COPYING3. If not see | |
| 20 <http://www.gnu.org/licenses/>. */ | |
| 21 | |
| 22 #include "config.h" | |
| 23 #include "system.h" | |
| 24 #include "coretypes.h" | |
| 25 #include "tm.h" | |
| 26 #include "rtl.h" | |
| 27 #include "regs.h" | |
| 28 #include "insn-config.h" | |
| 29 #include "flags.h" | |
| 30 #include "hard-reg-set.h" | |
| 31 #include "recog.h" | |
| 32 #include "basic-block.h" | |
|
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33 #include "df.h" |
| 0 | 34 #include "reload.h" |
| 35 #include "function.h" | |
| 36 #include "expr.h" | |
|
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37 #include "diagnostic-core.h" |
| 0 | 38 #include "tm_p.h" |
| 39 #include "addresses.h" | |
| 40 #include "output.h" | |
| 41 #include "ggc.h" | |
| 42 | |
| 43 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD) | |
| 44 | |
|
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45 #define regno_save_mode \ |
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46 (this_target_reload->x_regno_save_mode) |
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47 #define cached_reg_save_code \ |
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48 (this_target_reload->x_cached_reg_save_code) |
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49 #define cached_reg_restore_code \ |
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50 (this_target_reload->x_cached_reg_restore_code) |
| 0 | 51 |
| 52 /* For each hard register, a place on the stack where it can be saved, | |
| 53 if needed. */ | |
| 54 | |
| 55 static rtx | |
| 56 regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1]; | |
| 57 | |
| 58 /* The number of elements in the subsequent array. */ | |
| 59 static int save_slots_num; | |
| 60 | |
| 61 /* Allocated slots so far. */ | |
| 62 static rtx save_slots[FIRST_PSEUDO_REGISTER]; | |
| 63 | |
| 64 /* Set of hard regs currently residing in save area (during insn scan). */ | |
| 65 | |
| 66 static HARD_REG_SET hard_regs_saved; | |
| 67 | |
| 68 /* Number of registers currently in hard_regs_saved. */ | |
| 69 | |
| 70 static int n_regs_saved; | |
| 71 | |
| 72 /* Computed by mark_referenced_regs, all regs referenced in a given | |
| 73 insn. */ | |
| 74 static HARD_REG_SET referenced_regs; | |
| 75 | |
| 76 | |
|
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77 typedef void refmarker_fn (rtx *loc, enum machine_mode mode, int hardregno, |
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78 void *mark_arg); |
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79 |
| 0 | 80 static int reg_save_code (int, enum machine_mode); |
| 81 static int reg_restore_code (int, enum machine_mode); | |
| 82 | |
| 83 struct saved_hard_reg; | |
| 84 static void initiate_saved_hard_regs (void); | |
| 85 static struct saved_hard_reg *new_saved_hard_reg (int, int); | |
| 86 static void finish_saved_hard_regs (void); | |
| 87 static int saved_hard_reg_compare_func (const void *, const void *); | |
| 88 | |
| 89 static void mark_set_regs (rtx, const_rtx, void *); | |
|
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90 static void mark_referenced_regs (rtx *, refmarker_fn *mark, void *mark_arg); |
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91 static refmarker_fn mark_reg_as_referenced; |
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92 static refmarker_fn replace_reg_with_saved_mem; |
| 0 | 93 static int insert_save (struct insn_chain *, int, int, HARD_REG_SET *, |
| 94 enum machine_mode *); | |
| 95 static int insert_restore (struct insn_chain *, int, int, int, | |
| 96 enum machine_mode *); | |
| 97 static struct insn_chain *insert_one_insn (struct insn_chain *, int, int, | |
| 98 rtx); | |
| 99 static void add_stored_regs (rtx, const_rtx, void *); | |
| 100 | |
| 101 | |
| 102 | |
| 103 static GTY(()) rtx savepat; | |
| 104 static GTY(()) rtx restpat; | |
| 105 static GTY(()) rtx test_reg; | |
| 106 static GTY(()) rtx test_mem; | |
| 107 static GTY(()) rtx saveinsn; | |
| 108 static GTY(()) rtx restinsn; | |
| 109 | |
| 110 /* Return the INSN_CODE used to save register REG in mode MODE. */ | |
| 111 static int | |
| 112 reg_save_code (int reg, enum machine_mode mode) | |
| 113 { | |
| 114 bool ok; | |
| 115 if (cached_reg_save_code[reg][mode]) | |
| 116 return cached_reg_save_code[reg][mode]; | |
| 117 if (!HARD_REGNO_MODE_OK (reg, mode)) | |
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118 { |
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119 /* Depending on how HARD_REGNO_MODE_OK is defined, range propagation |
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120 might deduce here that reg >= FIRST_PSEUDO_REGISTER. So the assert |
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121 below silences a warning. */ |
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122 gcc_assert (reg < FIRST_PSEUDO_REGISTER); |
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123 cached_reg_save_code[reg][mode] = -1; |
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124 cached_reg_restore_code[reg][mode] = -1; |
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125 return -1; |
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126 } |
| 0 | 127 |
| 128 /* Update the register number and modes of the register | |
| 129 and memory operand. */ | |
|
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130 SET_REGNO_RAW (test_reg, reg); |
| 0 | 131 PUT_MODE (test_reg, mode); |
| 132 PUT_MODE (test_mem, mode); | |
| 133 | |
| 134 /* Force re-recognition of the modified insns. */ | |
| 135 INSN_CODE (saveinsn) = -1; | |
| 136 INSN_CODE (restinsn) = -1; | |
| 137 | |
| 138 cached_reg_save_code[reg][mode] = recog_memoized (saveinsn); | |
| 139 cached_reg_restore_code[reg][mode] = recog_memoized (restinsn); | |
| 140 | |
| 141 /* Now extract both insns and see if we can meet their | |
| 142 constraints. */ | |
| 143 ok = (cached_reg_save_code[reg][mode] != -1 | |
| 144 && cached_reg_restore_code[reg][mode] != -1); | |
| 145 if (ok) | |
| 146 { | |
| 147 extract_insn (saveinsn); | |
| 148 ok = constrain_operands (1); | |
| 149 extract_insn (restinsn); | |
| 150 ok &= constrain_operands (1); | |
| 151 } | |
| 152 | |
| 153 if (! ok) | |
| 154 { | |
| 155 cached_reg_save_code[reg][mode] = -1; | |
| 156 cached_reg_restore_code[reg][mode] = -1; | |
| 157 } | |
| 158 gcc_assert (cached_reg_save_code[reg][mode]); | |
| 159 return cached_reg_save_code[reg][mode]; | |
| 160 } | |
| 161 | |
| 162 /* Return the INSN_CODE used to restore register REG in mode MODE. */ | |
| 163 static int | |
| 164 reg_restore_code (int reg, enum machine_mode mode) | |
| 165 { | |
| 166 if (cached_reg_restore_code[reg][mode]) | |
| 167 return cached_reg_restore_code[reg][mode]; | |
| 168 /* Populate our cache. */ | |
| 169 reg_save_code (reg, mode); | |
| 170 return cached_reg_restore_code[reg][mode]; | |
| 171 } | |
| 172 | |
| 173 /* Initialize for caller-save. | |
| 174 | |
| 175 Look at all the hard registers that are used by a call and for which | |
| 176 reginfo.c has not already excluded from being used across a call. | |
| 177 | |
| 178 Ensure that we can find a mode to save the register and that there is a | |
| 179 simple insn to save and restore the register. This latter check avoids | |
| 180 problems that would occur if we tried to save the MQ register of some | |
| 181 machines directly into memory. */ | |
| 182 | |
| 183 void | |
| 184 init_caller_save (void) | |
| 185 { | |
| 186 rtx addr_reg; | |
| 187 int offset; | |
| 188 rtx address; | |
| 189 int i, j; | |
| 190 | |
|
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191 if (caller_save_initialized_p) |
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192 return; |
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193 |
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194 caller_save_initialized_p = true; |
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195 |
| 0 | 196 CLEAR_HARD_REG_SET (no_caller_save_reg_set); |
| 197 /* First find all the registers that we need to deal with and all | |
| 198 the modes that they can have. If we can't find a mode to use, | |
| 199 we can't have the register live over calls. */ | |
| 200 | |
| 201 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
| 202 { | |
|
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203 if (call_used_regs[i] |
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204 && !TEST_HARD_REG_BIT (call_fixed_reg_set, i)) |
| 0 | 205 { |
| 206 for (j = 1; j <= MOVE_MAX_WORDS; j++) | |
| 207 { | |
| 208 regno_save_mode[i][j] = HARD_REGNO_CALLER_SAVE_MODE (i, j, | |
| 209 VOIDmode); | |
| 210 if (regno_save_mode[i][j] == VOIDmode && j == 1) | |
| 211 { | |
| 212 SET_HARD_REG_BIT (call_fixed_reg_set, i); | |
| 213 } | |
| 214 } | |
| 215 } | |
| 216 else | |
| 217 regno_save_mode[i][1] = VOIDmode; | |
| 218 } | |
| 219 | |
| 220 /* The following code tries to approximate the conditions under which | |
| 221 we can easily save and restore a register without scratch registers or | |
| 222 other complexities. It will usually work, except under conditions where | |
| 223 the validity of an insn operand is dependent on the address offset. | |
| 224 No such cases are currently known. | |
| 225 | |
| 226 We first find a typical offset from some BASE_REG_CLASS register. | |
| 227 This address is chosen by finding the first register in the class | |
| 228 and by finding the smallest power of two that is a valid offset from | |
| 229 that register in every mode we will use to save registers. */ | |
| 230 | |
| 231 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
| 232 if (TEST_HARD_REG_BIT | |
| 233 (reg_class_contents | |
| 234 [(int) base_reg_class (regno_save_mode[i][1], PLUS, CONST_INT)], i)) | |
| 235 break; | |
| 236 | |
| 237 gcc_assert (i < FIRST_PSEUDO_REGISTER); | |
| 238 | |
| 239 addr_reg = gen_rtx_REG (Pmode, i); | |
| 240 | |
| 241 for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1) | |
| 242 { | |
| 243 address = gen_rtx_PLUS (Pmode, addr_reg, GEN_INT (offset)); | |
| 244 | |
| 245 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
| 246 if (regno_save_mode[i][1] != VOIDmode | |
| 247 && ! strict_memory_address_p (regno_save_mode[i][1], address)) | |
| 248 break; | |
| 249 | |
| 250 if (i == FIRST_PSEUDO_REGISTER) | |
| 251 break; | |
| 252 } | |
| 253 | |
| 254 /* If we didn't find a valid address, we must use register indirect. */ | |
| 255 if (offset == 0) | |
| 256 address = addr_reg; | |
| 257 | |
| 258 /* Next we try to form an insn to save and restore the register. We | |
| 259 see if such an insn is recognized and meets its constraints. | |
| 260 | |
| 261 To avoid lots of unnecessary RTL allocation, we construct all the RTL | |
| 262 once, then modify the memory and register operands in-place. */ | |
| 263 | |
| 264 test_reg = gen_rtx_REG (VOIDmode, 0); | |
| 265 test_mem = gen_rtx_MEM (VOIDmode, address); | |
| 266 savepat = gen_rtx_SET (VOIDmode, test_mem, test_reg); | |
| 267 restpat = gen_rtx_SET (VOIDmode, test_reg, test_mem); | |
| 268 | |
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269 saveinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, savepat, 0, -1, 0); |
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270 restinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, restpat, 0, -1, 0); |
| 0 | 271 |
| 272 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
| 273 for (j = 1; j <= MOVE_MAX_WORDS; j++) | |
| 274 if (reg_save_code (i,regno_save_mode[i][j]) == -1) | |
| 275 { | |
| 276 regno_save_mode[i][j] = VOIDmode; | |
| 277 if (j == 1) | |
| 278 { | |
| 279 SET_HARD_REG_BIT (call_fixed_reg_set, i); | |
| 280 if (call_used_regs[i]) | |
| 281 SET_HARD_REG_BIT (no_caller_save_reg_set, i); | |
| 282 } | |
| 283 } | |
| 284 } | |
| 285 | |
| 286 | |
| 287 | |
| 288 /* Initialize save areas by showing that we haven't allocated any yet. */ | |
| 289 | |
| 290 void | |
| 291 init_save_areas (void) | |
| 292 { | |
| 293 int i, j; | |
| 294 | |
| 295 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
| 296 for (j = 1; j <= MOVE_MAX_WORDS; j++) | |
| 297 regno_save_mem[i][j] = 0; | |
| 298 save_slots_num = 0; | |
|
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299 |
| 0 | 300 } |
| 301 | |
| 302 /* The structure represents a hard register which should be saved | |
| 303 through the call. It is used when the integrated register | |
| 304 allocator (IRA) is used and sharing save slots is on. */ | |
| 305 struct saved_hard_reg | |
| 306 { | |
| 307 /* Order number starting with 0. */ | |
| 308 int num; | |
| 309 /* The hard regno. */ | |
| 310 int hard_regno; | |
| 311 /* Execution frequency of all calls through which given hard | |
| 312 register should be saved. */ | |
| 313 int call_freq; | |
| 314 /* Stack slot reserved to save the hard register through calls. */ | |
| 315 rtx slot; | |
| 316 /* True if it is first hard register in the chain of hard registers | |
| 317 sharing the same stack slot. */ | |
| 318 int first_p; | |
| 319 /* Order number of the next hard register structure with the same | |
| 320 slot in the chain. -1 represents end of the chain. */ | |
| 321 int next; | |
| 322 }; | |
| 323 | |
| 324 /* Map: hard register number to the corresponding structure. */ | |
| 325 static struct saved_hard_reg *hard_reg_map[FIRST_PSEUDO_REGISTER]; | |
| 326 | |
| 327 /* The number of all structures representing hard registers should be | |
| 328 saved, in order words, the number of used elements in the following | |
| 329 array. */ | |
| 330 static int saved_regs_num; | |
| 331 | |
| 332 /* Pointers to all the structures. Index is the order number of the | |
| 333 corresponding structure. */ | |
| 334 static struct saved_hard_reg *all_saved_regs[FIRST_PSEUDO_REGISTER]; | |
| 335 | |
| 336 /* First called function for work with saved hard registers. */ | |
| 337 static void | |
| 338 initiate_saved_hard_regs (void) | |
| 339 { | |
| 340 int i; | |
| 341 | |
| 342 saved_regs_num = 0; | |
| 343 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
| 344 hard_reg_map[i] = NULL; | |
| 345 } | |
| 346 | |
| 347 /* Allocate and return new saved hard register with given REGNO and | |
| 348 CALL_FREQ. */ | |
| 349 static struct saved_hard_reg * | |
| 350 new_saved_hard_reg (int regno, int call_freq) | |
| 351 { | |
| 352 struct saved_hard_reg *saved_reg; | |
| 353 | |
| 354 saved_reg | |
| 355 = (struct saved_hard_reg *) xmalloc (sizeof (struct saved_hard_reg)); | |
| 356 hard_reg_map[regno] = all_saved_regs[saved_regs_num] = saved_reg; | |
| 357 saved_reg->num = saved_regs_num++; | |
| 358 saved_reg->hard_regno = regno; | |
| 359 saved_reg->call_freq = call_freq; | |
| 360 saved_reg->first_p = FALSE; | |
| 361 saved_reg->next = -1; | |
| 362 return saved_reg; | |
| 363 } | |
| 364 | |
| 365 /* Free memory allocated for the saved hard registers. */ | |
| 366 static void | |
| 367 finish_saved_hard_regs (void) | |
| 368 { | |
| 369 int i; | |
| 370 | |
| 371 for (i = 0; i < saved_regs_num; i++) | |
| 372 free (all_saved_regs[i]); | |
| 373 } | |
| 374 | |
| 375 /* The function is used to sort the saved hard register structures | |
| 376 according their frequency. */ | |
| 377 static int | |
| 378 saved_hard_reg_compare_func (const void *v1p, const void *v2p) | |
| 379 { | |
| 380 const struct saved_hard_reg *p1 = *(struct saved_hard_reg * const *) v1p; | |
| 381 const struct saved_hard_reg *p2 = *(struct saved_hard_reg * const *) v2p; | |
|
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382 |
| 0 | 383 if (flag_omit_frame_pointer) |
| 384 { | |
| 385 if (p1->call_freq - p2->call_freq != 0) | |
| 386 return p1->call_freq - p2->call_freq; | |
| 387 } | |
| 388 else if (p2->call_freq - p1->call_freq != 0) | |
| 389 return p2->call_freq - p1->call_freq; | |
| 390 | |
| 391 return p1->num - p2->num; | |
| 392 } | |
| 393 | |
| 394 /* Allocate save areas for any hard registers that might need saving. | |
| 395 We take a conservative approach here and look for call-clobbered hard | |
| 396 registers that are assigned to pseudos that cross calls. This may | |
| 397 overestimate slightly (especially if some of these registers are later | |
| 398 used as spill registers), but it should not be significant. | |
| 399 | |
| 400 For IRA we use priority coloring to decrease stack slots needed for | |
| 401 saving hard registers through calls. We build conflicts for them | |
| 402 to do coloring. | |
| 403 | |
| 404 Future work: | |
| 405 | |
| 406 In the fallback case we should iterate backwards across all possible | |
| 407 modes for the save, choosing the largest available one instead of | |
| 408 falling back to the smallest mode immediately. (eg TF -> DF -> SF). | |
| 409 | |
| 410 We do not try to use "move multiple" instructions that exist | |
| 411 on some machines (such as the 68k moveml). It could be a win to try | |
| 412 and use them when possible. The hard part is doing it in a way that is | |
| 413 machine independent since they might be saving non-consecutive | |
| 414 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */ | |
| 415 | |
| 416 void | |
| 417 setup_save_areas (void) | |
| 418 { | |
|
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419 int i, j, k, freq; |
| 0 | 420 HARD_REG_SET hard_regs_used; |
|
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421 struct saved_hard_reg *saved_reg; |
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422 rtx insn; |
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423 struct insn_chain *chain, *next; |
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424 unsigned int regno; |
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425 HARD_REG_SET hard_regs_to_save, used_regs, this_insn_sets; |
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426 reg_set_iterator rsi; |
| 0 | 427 |
| 428 CLEAR_HARD_REG_SET (hard_regs_used); | |
|
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429 |
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430 /* Find every CALL_INSN and record which hard regs are live across the |
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431 call into HARD_REG_MAP and HARD_REGS_USED. */ |
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432 initiate_saved_hard_regs (); |
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433 /* Create hard reg saved regs. */ |
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434 for (chain = reload_insn_chain; chain != 0; chain = next) |
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435 { |
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436 insn = chain->insn; |
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437 next = chain->next; |
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438 if (!CALL_P (insn) |
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439 || find_reg_note (insn, REG_NORETURN, NULL)) |
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440 continue; |
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441 freq = REG_FREQ_FROM_BB (BLOCK_FOR_INSN (insn)); |
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442 REG_SET_TO_HARD_REG_SET (hard_regs_to_save, |
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443 &chain->live_throughout); |
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444 COPY_HARD_REG_SET (used_regs, call_used_reg_set); |
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445 |
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446 /* Record all registers set in this call insn. These don't |
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447 need to be saved. N.B. the call insn might set a subreg |
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448 of a multi-hard-reg pseudo; then the pseudo is considered |
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449 live during the call, but the subreg that is set |
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450 isn't. */ |
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451 CLEAR_HARD_REG_SET (this_insn_sets); |
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452 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets); |
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453 /* Sibcalls are considered to set the return value. */ |
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454 if (SIBLING_CALL_P (insn) && crtl->return_rtx) |
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455 mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets); |
| 0 | 456 |
|
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457 AND_COMPL_HARD_REG_SET (used_regs, call_fixed_reg_set); |
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458 AND_COMPL_HARD_REG_SET (used_regs, this_insn_sets); |
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459 AND_HARD_REG_SET (hard_regs_to_save, used_regs); |
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460 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) |
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461 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno)) |
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462 { |
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463 if (hard_reg_map[regno] != NULL) |
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464 hard_reg_map[regno]->call_freq += freq; |
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465 else |
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466 saved_reg = new_saved_hard_reg (regno, freq); |
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467 SET_HARD_REG_BIT (hard_regs_used, regno); |
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468 } |
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469 /* Look through all live pseudos, mark their hard registers. */ |
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470 EXECUTE_IF_SET_IN_REG_SET |
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471 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi) |
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472 { |
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473 int r = reg_renumber[regno]; |
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474 int bound; |
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475 |
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476 if (r < 0) |
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477 continue; |
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478 |
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479 bound = r + hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)]; |
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480 for (; r < bound; r++) |
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481 if (TEST_HARD_REG_BIT (used_regs, r)) |
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482 { |
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483 if (hard_reg_map[r] != NULL) |
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484 hard_reg_map[r]->call_freq += freq; |
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485 else |
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486 saved_reg = new_saved_hard_reg (r, freq); |
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487 SET_HARD_REG_BIT (hard_regs_to_save, r); |
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488 SET_HARD_REG_BIT (hard_regs_used, r); |
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489 } |
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490 } |
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491 } |
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492 |
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493 /* If requested, figure out which hard regs can share save slots. */ |
| 0 | 494 if (optimize && flag_ira_share_save_slots) |
| 495 { | |
|
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496 rtx slot; |
| 0 | 497 char *saved_reg_conflicts; |
|
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498 int next_k; |
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499 struct saved_hard_reg *saved_reg2, *saved_reg3; |
| 0 | 500 int call_saved_regs_num; |
| 501 struct saved_hard_reg *call_saved_regs[FIRST_PSEUDO_REGISTER]; | |
| 502 int best_slot_num; | |
| 503 int prev_save_slots_num; | |
| 504 rtx prev_save_slots[FIRST_PSEUDO_REGISTER]; | |
|
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505 |
| 0 | 506 /* Find saved hard register conflicts. */ |
| 507 saved_reg_conflicts = (char *) xmalloc (saved_regs_num * saved_regs_num); | |
| 508 memset (saved_reg_conflicts, 0, saved_regs_num * saved_regs_num); | |
| 509 for (chain = reload_insn_chain; chain != 0; chain = next) | |
| 510 { | |
| 511 call_saved_regs_num = 0; | |
| 512 insn = chain->insn; | |
| 513 next = chain->next; | |
|
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514 if (!CALL_P (insn) |
| 0 | 515 || find_reg_note (insn, REG_NORETURN, NULL)) |
| 516 continue; | |
| 517 REG_SET_TO_HARD_REG_SET (hard_regs_to_save, | |
| 518 &chain->live_throughout); | |
| 519 COPY_HARD_REG_SET (used_regs, call_used_reg_set); | |
| 520 | |
| 521 /* Record all registers set in this call insn. These don't | |
| 522 need to be saved. N.B. the call insn might set a subreg | |
| 523 of a multi-hard-reg pseudo; then the pseudo is considered | |
| 524 live during the call, but the subreg that is set | |
| 525 isn't. */ | |
| 526 CLEAR_HARD_REG_SET (this_insn_sets); | |
| 527 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets); | |
| 528 /* Sibcalls are considered to set the return value, | |
|
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529 compare df-scan.c:df_get_call_refs. */ |
| 0 | 530 if (SIBLING_CALL_P (insn) && crtl->return_rtx) |
| 531 mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets); | |
| 532 | |
| 533 AND_COMPL_HARD_REG_SET (used_regs, call_fixed_reg_set); | |
| 534 AND_COMPL_HARD_REG_SET (used_regs, this_insn_sets); | |
| 535 AND_HARD_REG_SET (hard_regs_to_save, used_regs); | |
| 536 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
| 537 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno)) | |
| 538 { | |
| 539 gcc_assert (hard_reg_map[regno] != NULL); | |
| 540 call_saved_regs[call_saved_regs_num++] = hard_reg_map[regno]; | |
| 541 } | |
| 542 /* Look through all live pseudos, mark their hard registers. */ | |
| 543 EXECUTE_IF_SET_IN_REG_SET | |
| 544 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi) | |
| 545 { | |
| 546 int r = reg_renumber[regno]; | |
| 547 int bound; | |
|
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548 |
| 0 | 549 if (r < 0) |
| 550 continue; | |
| 551 | |
| 552 bound = r + hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)]; | |
| 553 for (; r < bound; r++) | |
| 554 if (TEST_HARD_REG_BIT (used_regs, r)) | |
| 555 call_saved_regs[call_saved_regs_num++] = hard_reg_map[r]; | |
| 556 } | |
| 557 for (i = 0; i < call_saved_regs_num; i++) | |
| 558 { | |
| 559 saved_reg = call_saved_regs[i]; | |
| 560 for (j = 0; j < call_saved_regs_num; j++) | |
| 561 if (i != j) | |
| 562 { | |
| 563 saved_reg2 = call_saved_regs[j]; | |
| 564 saved_reg_conflicts[saved_reg->num * saved_regs_num | |
| 565 + saved_reg2->num] | |
| 566 = saved_reg_conflicts[saved_reg2->num * saved_regs_num | |
| 567 + saved_reg->num] | |
| 568 = TRUE; | |
| 569 } | |
| 570 } | |
| 571 } | |
| 572 /* Sort saved hard regs. */ | |
| 573 qsort (all_saved_regs, saved_regs_num, sizeof (struct saved_hard_reg *), | |
| 574 saved_hard_reg_compare_func); | |
| 575 /* Initiate slots available from the previous reload | |
| 576 iteration. */ | |
| 577 prev_save_slots_num = save_slots_num; | |
| 578 memcpy (prev_save_slots, save_slots, save_slots_num * sizeof (rtx)); | |
| 579 save_slots_num = 0; | |
| 580 /* Allocate stack slots for the saved hard registers. */ | |
| 581 for (i = 0; i < saved_regs_num; i++) | |
| 582 { | |
| 583 saved_reg = all_saved_regs[i]; | |
| 584 regno = saved_reg->hard_regno; | |
| 585 for (j = 0; j < i; j++) | |
| 586 { | |
| 587 saved_reg2 = all_saved_regs[j]; | |
| 588 if (! saved_reg2->first_p) | |
| 589 continue; | |
| 590 slot = saved_reg2->slot; | |
| 591 for (k = j; k >= 0; k = next_k) | |
| 592 { | |
| 593 saved_reg3 = all_saved_regs[k]; | |
| 594 next_k = saved_reg3->next; | |
| 595 if (saved_reg_conflicts[saved_reg->num * saved_regs_num | |
| 596 + saved_reg3->num]) | |
| 597 break; | |
| 598 } | |
| 599 if (k < 0 | |
| 600 && (GET_MODE_SIZE (regno_save_mode[regno][1]) | |
| 601 <= GET_MODE_SIZE (regno_save_mode | |
| 602 [saved_reg2->hard_regno][1]))) | |
| 603 { | |
| 604 saved_reg->slot | |
| 605 = adjust_address_nv | |
| 606 (slot, regno_save_mode[saved_reg->hard_regno][1], 0); | |
| 607 regno_save_mem[regno][1] = saved_reg->slot; | |
| 608 saved_reg->next = saved_reg2->next; | |
| 609 saved_reg2->next = i; | |
| 610 if (dump_file != NULL) | |
| 611 fprintf (dump_file, "%d uses slot of %d\n", | |
| 612 regno, saved_reg2->hard_regno); | |
| 613 break; | |
| 614 } | |
| 615 } | |
| 616 if (j == i) | |
| 617 { | |
| 618 saved_reg->first_p = TRUE; | |
| 619 for (best_slot_num = -1, j = 0; j < prev_save_slots_num; j++) | |
| 620 { | |
| 621 slot = prev_save_slots[j]; | |
| 622 if (slot == NULL_RTX) | |
| 623 continue; | |
| 624 if (GET_MODE_SIZE (regno_save_mode[regno][1]) | |
| 625 <= GET_MODE_SIZE (GET_MODE (slot)) | |
| 626 && best_slot_num < 0) | |
| 627 best_slot_num = j; | |
| 628 if (GET_MODE (slot) == regno_save_mode[regno][1]) | |
| 629 break; | |
| 630 } | |
| 631 if (best_slot_num >= 0) | |
| 632 { | |
| 633 saved_reg->slot = prev_save_slots[best_slot_num]; | |
| 634 saved_reg->slot | |
| 635 = adjust_address_nv | |
| 636 (saved_reg->slot, | |
| 637 regno_save_mode[saved_reg->hard_regno][1], 0); | |
| 638 if (dump_file != NULL) | |
| 639 fprintf (dump_file, | |
| 640 "%d uses a slot from prev iteration\n", regno); | |
| 641 prev_save_slots[best_slot_num] = NULL_RTX; | |
| 642 if (best_slot_num + 1 == prev_save_slots_num) | |
| 643 prev_save_slots_num--; | |
| 644 } | |
| 645 else | |
| 646 { | |
| 647 saved_reg->slot | |
| 648 = assign_stack_local_1 | |
| 649 (regno_save_mode[regno][1], | |
|
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650 GET_MODE_SIZE (regno_save_mode[regno][1]), 0, |
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651 ASLK_REDUCE_ALIGN); |
| 0 | 652 if (dump_file != NULL) |
| 653 fprintf (dump_file, "%d uses a new slot\n", regno); | |
| 654 } | |
| 655 regno_save_mem[regno][1] = saved_reg->slot; | |
| 656 save_slots[save_slots_num++] = saved_reg->slot; | |
| 657 } | |
| 658 } | |
| 659 free (saved_reg_conflicts); | |
| 660 finish_saved_hard_regs (); | |
| 661 } | |
| 662 else | |
| 663 { | |
|
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664 /* We are not sharing slots. |
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665 |
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666 Run through all the call-used hard-registers and allocate |
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667 space for each in the caller-save area. Try to allocate space |
| 0 | 668 in a manner which allows multi-register saves/restores to be done. */ |
|
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669 |
| 0 | 670 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) |
| 671 for (j = MOVE_MAX_WORDS; j > 0; j--) | |
| 672 { | |
| 673 int do_save = 1; | |
|
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674 |
| 0 | 675 /* If no mode exists for this size, try another. Also break out |
| 676 if we have already saved this hard register. */ | |
| 677 if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0) | |
| 678 continue; | |
|
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679 |
| 0 | 680 /* See if any register in this group has been saved. */ |
| 681 for (k = 0; k < j; k++) | |
| 682 if (regno_save_mem[i + k][1]) | |
| 683 { | |
| 684 do_save = 0; | |
| 685 break; | |
| 686 } | |
| 687 if (! do_save) | |
| 688 continue; | |
|
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689 |
| 0 | 690 for (k = 0; k < j; k++) |
| 691 if (! TEST_HARD_REG_BIT (hard_regs_used, i + k)) | |
| 692 { | |
| 693 do_save = 0; | |
| 694 break; | |
| 695 } | |
| 696 if (! do_save) | |
| 697 continue; | |
|
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698 |
| 0 | 699 /* We have found an acceptable mode to store in. Since |
| 700 hard register is always saved in the widest mode | |
| 701 available, the mode may be wider than necessary, it is | |
| 702 OK to reduce the alignment of spill space. We will | |
| 703 verify that it is equal to or greater than required | |
| 704 when we restore and save the hard register in | |
| 705 insert_restore and insert_save. */ | |
| 706 regno_save_mem[i][j] | |
| 707 = assign_stack_local_1 (regno_save_mode[i][j], | |
| 708 GET_MODE_SIZE (regno_save_mode[i][j]), | |
|
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709 0, ASLK_REDUCE_ALIGN); |
|
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710 |
| 0 | 711 /* Setup single word save area just in case... */ |
| 712 for (k = 0; k < j; k++) | |
| 713 /* This should not depend on WORDS_BIG_ENDIAN. | |
| 714 The order of words in regs is the same as in memory. */ | |
| 715 regno_save_mem[i + k][1] | |
| 716 = adjust_address_nv (regno_save_mem[i][j], | |
| 717 regno_save_mode[i + k][1], | |
| 718 k * UNITS_PER_WORD); | |
| 719 } | |
| 720 } | |
| 721 | |
| 722 /* Now loop again and set the alias set of any save areas we made to | |
| 723 the alias set used to represent frame objects. */ | |
| 724 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
| 725 for (j = MOVE_MAX_WORDS; j > 0; j--) | |
| 726 if (regno_save_mem[i][j] != 0) | |
| 727 set_mem_alias_set (regno_save_mem[i][j], get_frame_alias_set ()); | |
| 728 } | |
| 729 | |
| 730 | |
| 731 | |
| 732 /* Find the places where hard regs are live across calls and save them. */ | |
| 733 | |
| 734 void | |
| 735 save_call_clobbered_regs (void) | |
| 736 { | |
|
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737 struct insn_chain *chain, *next, *last = NULL; |
| 0 | 738 enum machine_mode save_mode [FIRST_PSEUDO_REGISTER]; |
| 739 | |
| 740 /* Computed in mark_set_regs, holds all registers set by the current | |
| 741 instruction. */ | |
| 742 HARD_REG_SET this_insn_sets; | |
| 743 | |
| 744 CLEAR_HARD_REG_SET (hard_regs_saved); | |
| 745 n_regs_saved = 0; | |
| 746 | |
| 747 for (chain = reload_insn_chain; chain != 0; chain = next) | |
| 748 { | |
| 749 rtx insn = chain->insn; | |
| 750 enum rtx_code code = GET_CODE (insn); | |
| 751 | |
| 752 next = chain->next; | |
| 753 | |
| 754 gcc_assert (!chain->is_caller_save_insn); | |
| 755 | |
|
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756 if (NONDEBUG_INSN_P (insn)) |
| 0 | 757 { |
| 758 /* If some registers have been saved, see if INSN references | |
| 759 any of them. We must restore them before the insn if so. */ | |
| 760 | |
| 761 if (n_regs_saved) | |
| 762 { | |
| 763 int regno; | |
|
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|
764 HARD_REG_SET this_insn_sets; |
| 0 | 765 |
| 766 if (code == JUMP_INSN) | |
| 767 /* Restore all registers if this is a JUMP_INSN. */ | |
| 768 COPY_HARD_REG_SET (referenced_regs, hard_regs_saved); | |
| 769 else | |
| 770 { | |
| 771 CLEAR_HARD_REG_SET (referenced_regs); | |
|
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772 mark_referenced_regs (&PATTERN (insn), |
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773 mark_reg_as_referenced, NULL); |
| 0 | 774 AND_HARD_REG_SET (referenced_regs, hard_regs_saved); |
| 775 } | |
| 776 | |
| 777 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
| 778 if (TEST_HARD_REG_BIT (referenced_regs, regno)) | |
|
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779 regno += insert_restore (chain, 1, regno, MOVE_MAX_WORDS, |
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780 save_mode); |
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781 /* If a saved register is set after the call, this means we no |
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782 longer should restore it. This can happen when parts of a |
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783 multi-word pseudo do not conflict with other pseudos, so |
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784 IRA may allocate the same hard register for both. One may |
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785 be live across the call, while the other is set |
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786 afterwards. */ |
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787 CLEAR_HARD_REG_SET (this_insn_sets); |
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788 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets); |
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789 AND_COMPL_HARD_REG_SET (hard_regs_saved, this_insn_sets); |
| 0 | 790 } |
| 791 | |
| 792 if (code == CALL_INSN | |
| 793 && ! SIBLING_CALL_P (insn) | |
| 794 && ! find_reg_note (insn, REG_NORETURN, NULL)) | |
| 795 { | |
| 796 unsigned regno; | |
| 797 HARD_REG_SET hard_regs_to_save; | |
| 798 reg_set_iterator rsi; | |
| 799 | |
| 800 /* Use the register life information in CHAIN to compute which | |
| 801 regs are live during the call. */ | |
| 802 REG_SET_TO_HARD_REG_SET (hard_regs_to_save, | |
| 803 &chain->live_throughout); | |
| 804 /* Save hard registers always in the widest mode available. */ | |
| 805 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
| 806 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno)) | |
| 807 save_mode [regno] = regno_save_mode [regno][1]; | |
| 808 else | |
| 809 save_mode [regno] = VOIDmode; | |
| 810 | |
| 811 /* Look through all live pseudos, mark their hard registers | |
| 812 and choose proper mode for saving. */ | |
| 813 EXECUTE_IF_SET_IN_REG_SET | |
| 814 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi) | |
| 815 { | |
| 816 int r = reg_renumber[regno]; | |
| 817 int nregs; | |
| 818 enum machine_mode mode; | |
| 819 | |
| 820 if (r < 0) | |
| 821 continue; | |
| 822 nregs = hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)]; | |
| 823 mode = HARD_REGNO_CALLER_SAVE_MODE | |
| 824 (r, nregs, PSEUDO_REGNO_MODE (regno)); | |
| 825 if (GET_MODE_BITSIZE (mode) | |
| 826 > GET_MODE_BITSIZE (save_mode[r])) | |
| 827 save_mode[r] = mode; | |
| 828 while (nregs-- > 0) | |
| 829 SET_HARD_REG_BIT (hard_regs_to_save, r + nregs); | |
| 830 } | |
| 831 | |
| 832 /* Record all registers set in this call insn. These don't need | |
| 833 to be saved. N.B. the call insn might set a subreg of a | |
| 834 multi-hard-reg pseudo; then the pseudo is considered live | |
| 835 during the call, but the subreg that is set isn't. */ | |
| 836 CLEAR_HARD_REG_SET (this_insn_sets); | |
| 837 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets); | |
| 838 | |
| 839 /* Compute which hard regs must be saved before this call. */ | |
| 840 AND_COMPL_HARD_REG_SET (hard_regs_to_save, call_fixed_reg_set); | |
| 841 AND_COMPL_HARD_REG_SET (hard_regs_to_save, this_insn_sets); | |
| 842 AND_COMPL_HARD_REG_SET (hard_regs_to_save, hard_regs_saved); | |
| 843 AND_HARD_REG_SET (hard_regs_to_save, call_used_reg_set); | |
| 844 | |
| 845 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
| 846 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno)) | |
| 847 regno += insert_save (chain, 1, regno, &hard_regs_to_save, save_mode); | |
| 848 | |
| 849 /* Must recompute n_regs_saved. */ | |
| 850 n_regs_saved = 0; | |
| 851 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
| 852 if (TEST_HARD_REG_BIT (hard_regs_saved, regno)) | |
| 853 n_regs_saved++; | |
| 854 } | |
|
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855 last = chain; |
| 0 | 856 } |
|
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857 else if (DEBUG_INSN_P (insn) && n_regs_saved) |
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858 mark_referenced_regs (&PATTERN (insn), |
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859 replace_reg_with_saved_mem, |
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860 save_mode); |
| 0 | 861 |
| 862 if (chain->next == 0 || chain->next->block != chain->block) | |
| 863 { | |
| 864 int regno; | |
| 865 /* At the end of the basic block, we must restore any registers that | |
| 866 remain saved. If the last insn in the block is a JUMP_INSN, put | |
| 867 the restore before the insn, otherwise, put it after the insn. */ | |
| 868 | |
|
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869 if (n_regs_saved |
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870 && DEBUG_INSN_P (insn) |
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871 && last |
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872 && last->block == chain->block) |
|
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873 { |
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874 rtx ins, prev; |
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875 basic_block bb = BLOCK_FOR_INSN (insn); |
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876 |
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877 /* When adding hard reg restores after a DEBUG_INSN, move |
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878 all notes between last real insn and this DEBUG_INSN after |
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879 the DEBUG_INSN, otherwise we could get code |
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880 -g/-g0 differences. */ |
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881 for (ins = PREV_INSN (insn); ins != last->insn; ins = prev) |
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882 { |
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883 prev = PREV_INSN (ins); |
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884 if (NOTE_P (ins)) |
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885 { |
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886 NEXT_INSN (prev) = NEXT_INSN (ins); |
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887 PREV_INSN (NEXT_INSN (ins)) = prev; |
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888 PREV_INSN (ins) = insn; |
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889 NEXT_INSN (ins) = NEXT_INSN (insn); |
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890 NEXT_INSN (insn) = ins; |
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891 if (NEXT_INSN (ins)) |
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892 PREV_INSN (NEXT_INSN (ins)) = ins; |
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893 if (BB_END (bb) == insn) |
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894 BB_END (bb) = ins; |
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895 } |
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896 else |
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897 gcc_assert (DEBUG_INSN_P (ins)); |
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898 } |
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899 } |
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900 last = NULL; |
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901 |
| 0 | 902 if (n_regs_saved) |
| 903 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
| 904 if (TEST_HARD_REG_BIT (hard_regs_saved, regno)) | |
| 905 regno += insert_restore (chain, JUMP_P (insn), | |
| 906 regno, MOVE_MAX_WORDS, save_mode); | |
| 907 } | |
| 908 } | |
| 909 } | |
| 910 | |
| 911 /* Here from note_stores, or directly from save_call_clobbered_regs, when | |
| 912 an insn stores a value in a register. | |
| 913 Set the proper bit or bits in this_insn_sets. All pseudos that have | |
| 914 been assigned hard regs have had their register number changed already, | |
| 915 so we can ignore pseudos. */ | |
| 916 static void | |
| 917 mark_set_regs (rtx reg, const_rtx setter ATTRIBUTE_UNUSED, void *data) | |
| 918 { | |
| 919 int regno, endregno, i; | |
| 920 HARD_REG_SET *this_insn_sets = (HARD_REG_SET *) data; | |
| 921 | |
| 922 if (GET_CODE (reg) == SUBREG) | |
| 923 { | |
| 924 rtx inner = SUBREG_REG (reg); | |
| 925 if (!REG_P (inner) || REGNO (inner) >= FIRST_PSEUDO_REGISTER) | |
| 926 return; | |
| 927 regno = subreg_regno (reg); | |
| 928 endregno = regno + subreg_nregs (reg); | |
| 929 } | |
| 930 else if (REG_P (reg) | |
| 931 && REGNO (reg) < FIRST_PSEUDO_REGISTER) | |
| 932 { | |
| 933 regno = REGNO (reg); | |
| 934 endregno = END_HARD_REGNO (reg); | |
| 935 } | |
| 936 else | |
| 937 return; | |
| 938 | |
| 939 for (i = regno; i < endregno; i++) | |
| 940 SET_HARD_REG_BIT (*this_insn_sets, i); | |
| 941 } | |
| 942 | |
| 943 /* Here from note_stores when an insn stores a value in a register. | |
| 944 Set the proper bit or bits in the passed regset. All pseudos that have | |
| 945 been assigned hard regs have had their register number changed already, | |
| 946 so we can ignore pseudos. */ | |
| 947 static void | |
| 948 add_stored_regs (rtx reg, const_rtx setter, void *data) | |
| 949 { | |
| 950 int regno, endregno, i; | |
| 951 enum machine_mode mode = GET_MODE (reg); | |
| 952 int offset = 0; | |
| 953 | |
| 954 if (GET_CODE (setter) == CLOBBER) | |
| 955 return; | |
| 956 | |
| 957 if (GET_CODE (reg) == SUBREG | |
| 958 && REG_P (SUBREG_REG (reg)) | |
| 959 && REGNO (SUBREG_REG (reg)) < FIRST_PSEUDO_REGISTER) | |
| 960 { | |
| 961 offset = subreg_regno_offset (REGNO (SUBREG_REG (reg)), | |
| 962 GET_MODE (SUBREG_REG (reg)), | |
| 963 SUBREG_BYTE (reg), | |
| 964 GET_MODE (reg)); | |
| 965 regno = REGNO (SUBREG_REG (reg)) + offset; | |
| 966 endregno = regno + subreg_nregs (reg); | |
| 967 } | |
| 968 else | |
| 969 { | |
| 970 if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER) | |
| 971 return; | |
| 972 | |
| 973 regno = REGNO (reg) + offset; | |
| 974 endregno = end_hard_regno (mode, regno); | |
| 975 } | |
| 976 | |
| 977 for (i = regno; i < endregno; i++) | |
| 978 SET_REGNO_REG_SET ((regset) data, i); | |
| 979 } | |
| 980 | |
| 981 /* Walk X and record all referenced registers in REFERENCED_REGS. */ | |
| 982 static void | |
|
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983 mark_referenced_regs (rtx *loc, refmarker_fn *mark, void *arg) |
| 0 | 984 { |
|
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985 enum rtx_code code = GET_CODE (*loc); |
| 0 | 986 const char *fmt; |
| 987 int i, j; | |
| 988 | |
| 989 if (code == SET) | |
|
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990 mark_referenced_regs (&SET_SRC (*loc), mark, arg); |
| 0 | 991 if (code == SET || code == CLOBBER) |
| 992 { | |
|
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993 loc = &SET_DEST (*loc); |
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994 code = GET_CODE (*loc); |
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995 if ((code == REG && REGNO (*loc) < FIRST_PSEUDO_REGISTER) |
| 0 | 996 || code == PC || code == CC0 |
|
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997 || (code == SUBREG && REG_P (SUBREG_REG (*loc)) |
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998 && REGNO (SUBREG_REG (*loc)) < FIRST_PSEUDO_REGISTER |
| 0 | 999 /* If we're setting only part of a multi-word register, |
| 1000 we shall mark it as referenced, because the words | |
| 1001 that are not being set should be restored. */ | |
|
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1002 && ((GET_MODE_SIZE (GET_MODE (*loc)) |
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1003 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (*loc)))) |
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1004 || (GET_MODE_SIZE (GET_MODE (SUBREG_REG (*loc))) |
| 0 | 1005 <= UNITS_PER_WORD)))) |
| 1006 return; | |
| 1007 } | |
| 1008 if (code == MEM || code == SUBREG) | |
| 1009 { | |
|
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1010 loc = &XEXP (*loc, 0); |
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1011 code = GET_CODE (*loc); |
| 0 | 1012 } |
| 1013 | |
| 1014 if (code == REG) | |
| 1015 { | |
|
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1016 int regno = REGNO (*loc); |
| 0 | 1017 int hardregno = (regno < FIRST_PSEUDO_REGISTER ? regno |
| 1018 : reg_renumber[regno]); | |
| 1019 | |
| 1020 if (hardregno >= 0) | |
|
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1021 mark (loc, GET_MODE (*loc), hardregno, arg); |
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1022 else if (arg) |
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1023 /* ??? Will we ever end up with an equiv expression in a debug |
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1024 insn, that would have required restoring a reg, or will |
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1025 reload take care of it for us? */ |
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1026 return; |
| 0 | 1027 /* If this is a pseudo that did not get a hard register, scan its |
| 1028 memory location, since it might involve the use of another | |
| 1029 register, which might be saved. */ | |
| 1030 else if (reg_equiv_mem[regno] != 0) | |
|
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1031 mark_referenced_regs (&XEXP (reg_equiv_mem[regno], 0), mark, arg); |
| 0 | 1032 else if (reg_equiv_address[regno] != 0) |
|
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1033 mark_referenced_regs (®_equiv_address[regno], mark, arg); |
| 0 | 1034 return; |
| 1035 } | |
| 1036 | |
| 1037 fmt = GET_RTX_FORMAT (code); | |
| 1038 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
| 1039 { | |
| 1040 if (fmt[i] == 'e') | |
|
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1041 mark_referenced_regs (&XEXP (*loc, i), mark, arg); |
| 0 | 1042 else if (fmt[i] == 'E') |
|
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1043 for (j = XVECLEN (*loc, i) - 1; j >= 0; j--) |
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1044 mark_referenced_regs (&XVECEXP (*loc, i, j), mark, arg); |
| 0 | 1045 } |
| 1046 } | |
|
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1047 |
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1048 /* Parameter function for mark_referenced_regs() that adds registers |
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1049 present in the insn and in equivalent mems and addresses to |
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1050 referenced_regs. */ |
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1051 |
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1052 static void |
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1053 mark_reg_as_referenced (rtx *loc ATTRIBUTE_UNUSED, |
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1054 enum machine_mode mode, |
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1055 int hardregno, |
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1056 void *arg ATTRIBUTE_UNUSED) |
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1057 { |
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|
1058 add_to_hard_reg_set (&referenced_regs, mode, hardregno); |
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1059 } |
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1060 |
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1061 /* Parameter function for mark_referenced_regs() that replaces |
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1062 registers referenced in a debug_insn that would have been restored, |
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1063 should it be a non-debug_insn, with their save locations. */ |
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1064 |
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1065 static void |
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1066 replace_reg_with_saved_mem (rtx *loc, |
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1067 enum machine_mode mode, |
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1068 int regno, |
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1069 void *arg) |
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1070 { |
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1071 unsigned int i, nregs = hard_regno_nregs [regno][mode]; |
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1072 rtx mem; |
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1073 enum machine_mode *save_mode = (enum machine_mode *)arg; |
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1074 |
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1075 for (i = 0; i < nregs; i++) |
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1076 if (TEST_HARD_REG_BIT (hard_regs_saved, regno + i)) |
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1077 break; |
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1078 |
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1079 /* If none of the registers in the range would need restoring, we're |
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1080 all set. */ |
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1081 if (i == nregs) |
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1082 return; |
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1083 |
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1084 while (++i < nregs) |
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1085 if (!TEST_HARD_REG_BIT (hard_regs_saved, regno + i)) |
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1086 break; |
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1087 |
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1088 if (i == nregs |
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1089 && regno_save_mem[regno][nregs]) |
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1090 { |
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1091 mem = copy_rtx (regno_save_mem[regno][nregs]); |
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1092 |
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1093 if (nregs == (unsigned int) hard_regno_nregs[regno][save_mode[regno]]) |
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1094 mem = adjust_address_nv (mem, save_mode[regno], 0); |
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1095 |
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1096 if (GET_MODE (mem) != mode) |
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1097 { |
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1098 /* This is gen_lowpart_if_possible(), but without validating |
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1099 the newly-formed address. */ |
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1100 int offset = 0; |
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1101 |
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1102 if (WORDS_BIG_ENDIAN) |
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1103 offset = (MAX (GET_MODE_SIZE (GET_MODE (mem)), UNITS_PER_WORD) |
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1104 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)); |
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1105 if (BYTES_BIG_ENDIAN) |
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1106 /* Adjust the address so that the address-after-the-data is |
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1107 unchanged. */ |
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1108 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode)) |
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1109 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (mem)))); |
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1110 |
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1111 mem = adjust_address_nv (mem, mode, offset); |
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1112 } |
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1113 } |
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1114 else |
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1115 { |
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1116 mem = gen_rtx_CONCATN (mode, rtvec_alloc (nregs)); |
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1117 for (i = 0; i < nregs; i++) |
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1118 if (TEST_HARD_REG_BIT (hard_regs_saved, regno + i)) |
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1119 { |
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1120 gcc_assert (regno_save_mem[regno + i][1]); |
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1121 XVECEXP (mem, 0, i) = copy_rtx (regno_save_mem[regno + i][1]); |
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1122 } |
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1123 else |
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1124 { |
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1125 gcc_assert (save_mode[regno] != VOIDmode); |
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1126 XVECEXP (mem, 0, i) = gen_rtx_REG (save_mode [regno], |
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1127 regno + i); |
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1128 } |
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1129 } |
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1130 |
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1131 gcc_assert (GET_MODE (mem) == mode); |
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1132 *loc = mem; |
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1133 } |
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1134 |
| 0 | 1135 |
| 1136 /* Insert a sequence of insns to restore. Place these insns in front of | |
| 1137 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is | |
| 1138 the maximum number of registers which should be restored during this call. | |
| 1139 It should never be less than 1 since we only work with entire registers. | |
| 1140 | |
| 1141 Note that we have verified in init_caller_save that we can do this | |
| 1142 with a simple SET, so use it. Set INSN_CODE to what we save there | |
| 1143 since the address might not be valid so the insn might not be recognized. | |
| 1144 These insns will be reloaded and have register elimination done by | |
| 1145 find_reload, so we need not worry about that here. | |
| 1146 | |
| 1147 Return the extra number of registers saved. */ | |
| 1148 | |
| 1149 static int | |
| 1150 insert_restore (struct insn_chain *chain, int before_p, int regno, | |
| 1151 int maxrestore, enum machine_mode *save_mode) | |
| 1152 { | |
| 1153 int i, k; | |
| 1154 rtx pat = NULL_RTX; | |
| 1155 int code; | |
| 1156 unsigned int numregs = 0; | |
| 1157 struct insn_chain *new_chain; | |
| 1158 rtx mem; | |
| 1159 | |
| 1160 /* A common failure mode if register status is not correct in the | |
| 1161 RTL is for this routine to be called with a REGNO we didn't | |
| 1162 expect to save. That will cause us to write an insn with a (nil) | |
| 1163 SET_DEST or SET_SRC. Instead of doing so and causing a crash | |
| 1164 later, check for this common case here instead. This will remove | |
| 1165 one step in debugging such problems. */ | |
| 1166 gcc_assert (regno_save_mem[regno][1]); | |
| 1167 | |
| 1168 /* Get the pattern to emit and update our status. | |
| 1169 | |
| 1170 See if we can restore `maxrestore' registers at once. Work | |
| 1171 backwards to the single register case. */ | |
| 1172 for (i = maxrestore; i > 0; i--) | |
| 1173 { | |
| 1174 int j; | |
| 1175 int ok = 1; | |
| 1176 | |
| 1177 if (regno_save_mem[regno][i] == 0) | |
| 1178 continue; | |
| 1179 | |
| 1180 for (j = 0; j < i; j++) | |
| 1181 if (! TEST_HARD_REG_BIT (hard_regs_saved, regno + j)) | |
| 1182 { | |
| 1183 ok = 0; | |
| 1184 break; | |
| 1185 } | |
| 1186 /* Must do this one restore at a time. */ | |
| 1187 if (! ok) | |
| 1188 continue; | |
| 1189 | |
| 1190 numregs = i; | |
| 1191 break; | |
| 1192 } | |
| 1193 | |
| 1194 mem = regno_save_mem [regno][numregs]; | |
| 1195 if (save_mode [regno] != VOIDmode | |
| 1196 && save_mode [regno] != GET_MODE (mem) | |
| 1197 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]] | |
| 1198 /* Check that insn to restore REGNO in save_mode[regno] is | |
| 1199 correct. */ | |
| 1200 && reg_save_code (regno, save_mode[regno]) >= 0) | |
|
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1201 mem = adjust_address_nv (mem, save_mode[regno], 0); |
| 0 | 1202 else |
| 1203 mem = copy_rtx (mem); | |
| 1204 | |
| 1205 /* Verify that the alignment of spill space is equal to or greater | |
| 1206 than required. */ | |
| 1207 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT, | |
| 1208 GET_MODE_ALIGNMENT (GET_MODE (mem))) <= MEM_ALIGN (mem)); | |
| 1209 | |
| 1210 pat = gen_rtx_SET (VOIDmode, | |
| 1211 gen_rtx_REG (GET_MODE (mem), | |
| 1212 regno), mem); | |
| 1213 code = reg_restore_code (regno, GET_MODE (mem)); | |
| 1214 new_chain = insert_one_insn (chain, before_p, code, pat); | |
| 1215 | |
| 1216 /* Clear status for all registers we restored. */ | |
| 1217 for (k = 0; k < i; k++) | |
| 1218 { | |
| 1219 CLEAR_HARD_REG_BIT (hard_regs_saved, regno + k); | |
| 1220 SET_REGNO_REG_SET (&new_chain->dead_or_set, regno + k); | |
| 1221 n_regs_saved--; | |
| 1222 } | |
| 1223 | |
| 1224 /* Tell our callers how many extra registers we saved/restored. */ | |
| 1225 return numregs - 1; | |
| 1226 } | |
| 1227 | |
| 1228 /* Like insert_restore above, but save registers instead. */ | |
| 1229 | |
| 1230 static int | |
| 1231 insert_save (struct insn_chain *chain, int before_p, int regno, | |
| 1232 HARD_REG_SET (*to_save), enum machine_mode *save_mode) | |
| 1233 { | |
| 1234 int i; | |
| 1235 unsigned int k; | |
| 1236 rtx pat = NULL_RTX; | |
| 1237 int code; | |
| 1238 unsigned int numregs = 0; | |
| 1239 struct insn_chain *new_chain; | |
| 1240 rtx mem; | |
| 1241 | |
| 1242 /* A common failure mode if register status is not correct in the | |
| 1243 RTL is for this routine to be called with a REGNO we didn't | |
| 1244 expect to save. That will cause us to write an insn with a (nil) | |
| 1245 SET_DEST or SET_SRC. Instead of doing so and causing a crash | |
| 1246 later, check for this common case here. This will remove one | |
| 1247 step in debugging such problems. */ | |
| 1248 gcc_assert (regno_save_mem[regno][1]); | |
| 1249 | |
| 1250 /* Get the pattern to emit and update our status. | |
| 1251 | |
| 1252 See if we can save several registers with a single instruction. | |
| 1253 Work backwards to the single register case. */ | |
| 1254 for (i = MOVE_MAX_WORDS; i > 0; i--) | |
| 1255 { | |
| 1256 int j; | |
| 1257 int ok = 1; | |
| 1258 if (regno_save_mem[regno][i] == 0) | |
| 1259 continue; | |
| 1260 | |
| 1261 for (j = 0; j < i; j++) | |
| 1262 if (! TEST_HARD_REG_BIT (*to_save, regno + j)) | |
| 1263 { | |
| 1264 ok = 0; | |
| 1265 break; | |
| 1266 } | |
| 1267 /* Must do this one save at a time. */ | |
| 1268 if (! ok) | |
| 1269 continue; | |
| 1270 | |
| 1271 numregs = i; | |
| 1272 break; | |
| 1273 } | |
| 1274 | |
| 1275 mem = regno_save_mem [regno][numregs]; | |
| 1276 if (save_mode [regno] != VOIDmode | |
| 1277 && save_mode [regno] != GET_MODE (mem) | |
| 1278 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]] | |
| 1279 /* Check that insn to save REGNO in save_mode[regno] is | |
| 1280 correct. */ | |
| 1281 && reg_save_code (regno, save_mode[regno]) >= 0) | |
|
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
1282 mem = adjust_address_nv (mem, save_mode[regno], 0); |
| 0 | 1283 else |
| 1284 mem = copy_rtx (mem); | |
| 1285 | |
| 1286 /* Verify that the alignment of spill space is equal to or greater | |
| 1287 than required. */ | |
| 1288 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT, | |
| 1289 GET_MODE_ALIGNMENT (GET_MODE (mem))) <= MEM_ALIGN (mem)); | |
| 1290 | |
| 1291 pat = gen_rtx_SET (VOIDmode, mem, | |
| 1292 gen_rtx_REG (GET_MODE (mem), | |
| 1293 regno)); | |
| 1294 code = reg_save_code (regno, GET_MODE (mem)); | |
| 1295 new_chain = insert_one_insn (chain, before_p, code, pat); | |
| 1296 | |
| 1297 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */ | |
| 1298 for (k = 0; k < numregs; k++) | |
| 1299 { | |
| 1300 SET_HARD_REG_BIT (hard_regs_saved, regno + k); | |
| 1301 SET_REGNO_REG_SET (&new_chain->dead_or_set, regno + k); | |
| 1302 n_regs_saved++; | |
| 1303 } | |
| 1304 | |
| 1305 /* Tell our callers how many extra registers we saved/restored. */ | |
| 1306 return numregs - 1; | |
| 1307 } | |
| 1308 | |
| 1309 /* A for_each_rtx callback used by add_used_regs. Add the hard-register | |
| 1310 equivalent of each REG to regset DATA. */ | |
| 1311 | |
| 1312 static int | |
| 1313 add_used_regs_1 (rtx *loc, void *data) | |
| 1314 { | |
| 1315 int regno, i; | |
| 1316 regset live; | |
| 1317 rtx x; | |
| 1318 | |
| 1319 x = *loc; | |
| 1320 live = (regset) data; | |
| 1321 if (REG_P (x)) | |
| 1322 { | |
| 1323 regno = REGNO (x); | |
| 1324 if (!HARD_REGISTER_NUM_P (regno)) | |
| 1325 regno = reg_renumber[regno]; | |
| 1326 if (regno >= 0) | |
| 1327 for (i = hard_regno_nregs[regno][GET_MODE (x)] - 1; i >= 0; i--) | |
| 1328 SET_REGNO_REG_SET (live, regno + i); | |
| 1329 } | |
| 1330 return 0; | |
| 1331 } | |
| 1332 | |
| 1333 /* A note_uses callback used by insert_one_insn. Add the hard-register | |
| 1334 equivalent of each REG to regset DATA. */ | |
| 1335 | |
| 1336 static void | |
| 1337 add_used_regs (rtx *loc, void *data) | |
| 1338 { | |
| 1339 for_each_rtx (loc, add_used_regs_1, data); | |
| 1340 } | |
| 1341 | |
| 1342 /* Emit a new caller-save insn and set the code. */ | |
| 1343 static struct insn_chain * | |
| 1344 insert_one_insn (struct insn_chain *chain, int before_p, int code, rtx pat) | |
| 1345 { | |
| 1346 rtx insn = chain->insn; | |
| 1347 struct insn_chain *new_chain; | |
| 1348 | |
| 1349 #ifdef HAVE_cc0 | |
| 1350 /* If INSN references CC0, put our insns in front of the insn that sets | |
| 1351 CC0. This is always safe, since the only way we could be passed an | |
| 1352 insn that references CC0 is for a restore, and doing a restore earlier | |
| 1353 isn't a problem. We do, however, assume here that CALL_INSNs don't | |
| 1354 reference CC0. Guard against non-INSN's like CODE_LABEL. */ | |
| 1355 | |
| 1356 if ((NONJUMP_INSN_P (insn) || JUMP_P (insn)) | |
| 1357 && before_p | |
| 1358 && reg_referenced_p (cc0_rtx, PATTERN (insn))) | |
| 1359 chain = chain->prev, insn = chain->insn; | |
| 1360 #endif | |
| 1361 | |
| 1362 new_chain = new_insn_chain (); | |
| 1363 if (before_p) | |
| 1364 { | |
| 1365 rtx link; | |
| 1366 | |
| 1367 new_chain->prev = chain->prev; | |
| 1368 if (new_chain->prev != 0) | |
| 1369 new_chain->prev->next = new_chain; | |
| 1370 else | |
| 1371 reload_insn_chain = new_chain; | |
| 1372 | |
| 1373 chain->prev = new_chain; | |
| 1374 new_chain->next = chain; | |
| 1375 new_chain->insn = emit_insn_before (pat, insn); | |
| 1376 /* ??? It would be nice if we could exclude the already / still saved | |
| 1377 registers from the live sets. */ | |
| 1378 COPY_REG_SET (&new_chain->live_throughout, &chain->live_throughout); | |
| 1379 note_uses (&PATTERN (chain->insn), add_used_regs, | |
| 1380 &new_chain->live_throughout); | |
| 1381 /* If CHAIN->INSN is a call, then the registers which contain | |
| 1382 the arguments to the function are live in the new insn. */ | |
| 1383 if (CALL_P (chain->insn)) | |
| 1384 for (link = CALL_INSN_FUNCTION_USAGE (chain->insn); | |
| 1385 link != NULL_RTX; | |
| 1386 link = XEXP (link, 1)) | |
| 1387 note_uses (&XEXP (link, 0), add_used_regs, | |
| 1388 &new_chain->live_throughout); | |
| 1389 | |
| 1390 CLEAR_REG_SET (&new_chain->dead_or_set); | |
| 1391 if (chain->insn == BB_HEAD (BASIC_BLOCK (chain->block))) | |
| 1392 BB_HEAD (BASIC_BLOCK (chain->block)) = new_chain->insn; | |
| 1393 } | |
| 1394 else | |
| 1395 { | |
| 1396 new_chain->next = chain->next; | |
| 1397 if (new_chain->next != 0) | |
| 1398 new_chain->next->prev = new_chain; | |
| 1399 chain->next = new_chain; | |
| 1400 new_chain->prev = chain; | |
| 1401 new_chain->insn = emit_insn_after (pat, insn); | |
| 1402 /* ??? It would be nice if we could exclude the already / still saved | |
| 1403 registers from the live sets, and observe REG_UNUSED notes. */ | |
| 1404 COPY_REG_SET (&new_chain->live_throughout, &chain->live_throughout); | |
| 1405 /* Registers that are set in CHAIN->INSN live in the new insn. | |
| 1406 (Unless there is a REG_UNUSED note for them, but we don't | |
| 1407 look for them here.) */ | |
| 1408 note_stores (PATTERN (chain->insn), add_stored_regs, | |
| 1409 &new_chain->live_throughout); | |
| 1410 CLEAR_REG_SET (&new_chain->dead_or_set); | |
| 1411 if (chain->insn == BB_END (BASIC_BLOCK (chain->block))) | |
| 1412 BB_END (BASIC_BLOCK (chain->block)) = new_chain->insn; | |
| 1413 } | |
| 1414 new_chain->block = chain->block; | |
| 1415 new_chain->is_caller_save_insn = 1; | |
| 1416 | |
| 1417 INSN_CODE (new_chain->insn) = code; | |
| 1418 return new_chain; | |
| 1419 } | |
| 1420 #include "gt-caller-save.h" |