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annotate gcc/config/arm/predicates.md @ 67:f6334be47118

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update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
author nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
date Tue, 22 Mar 2011 17:18:12 +0900
parents b7f97abdc517
children 04ced10e8804
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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1 ;; Predicate definitions for ARM and Thumb
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2 ;; Copyright (C) 2004, 2007, 2008, 2010 Free Software Foundation, Inc.
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3 ;; Contributed by ARM Ltd.
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4
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5 ;; This file is part of GCC.
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6
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7 ;; GCC is free software; you can redistribute it and/or modify it
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8 ;; under the terms of the GNU General Public License as published
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9 ;; by the Free Software Foundation; either version 3, or (at your
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10 ;; option) any later version.
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11
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12 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
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13 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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14 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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15 ;; License for more details.
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16
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17 ;; You should have received a copy of the GNU General Public License
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18 ;; along with GCC; see the file COPYING3. If not see
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19 ;; <http://www.gnu.org/licenses/>.
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20
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21 (define_predicate "s_register_operand"
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22 (match_code "reg,subreg")
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23 {
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24 if (GET_CODE (op) == SUBREG)
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25 op = SUBREG_REG (op);
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26 /* We don't consider registers whose class is NO_REGS
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27 to be a register operand. */
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28 /* XXX might have to check for lo regs only for thumb ??? */
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29 return (GET_CODE (op) == REG
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30 && (REGNO (op) >= FIRST_PSEUDO_REGISTER
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31 || REGNO_REG_CLASS (REGNO (op)) != NO_REGS));
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32 })
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33
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34 ;; Any hard register.
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35 (define_predicate "arm_hard_register_operand"
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36 (match_code "reg")
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37 {
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38 return REGNO (op) < FIRST_PSEUDO_REGISTER;
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39 })
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40
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41 ;; A low register.
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42 (define_predicate "low_register_operand"
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43 (and (match_code "reg")
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44 (match_test "REGNO (op) <= LAST_LO_REGNUM")))
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45
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46 ;; A low register or const_int.
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47 (define_predicate "low_reg_or_int_operand"
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48 (ior (match_code "const_int")
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49 (match_operand 0 "low_register_operand")))
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50
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51 ;; Any core register, or any pseudo. */
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52 (define_predicate "arm_general_register_operand"
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53 (match_code "reg,subreg")
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54 {
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55 if (GET_CODE (op) == SUBREG)
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56 op = SUBREG_REG (op);
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57
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58 return (GET_CODE (op) == REG
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59 && (REGNO (op) <= LAST_ARM_REGNUM
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60 || REGNO (op) >= FIRST_PSEUDO_REGISTER));
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61 })
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62
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63 (define_predicate "f_register_operand"
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64 (match_code "reg,subreg")
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65 {
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66 if (GET_CODE (op) == SUBREG)
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67 op = SUBREG_REG (op);
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68
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69 /* We don't consider registers whose class is NO_REGS
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70 to be a register operand. */
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71 return (GET_CODE (op) == REG
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72 && (REGNO (op) >= FIRST_PSEUDO_REGISTER
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73 || REGNO_REG_CLASS (REGNO (op)) == FPA_REGS));
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74 })
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75
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76 (define_predicate "vfp_register_operand"
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77 (match_code "reg,subreg")
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78 {
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79 if (GET_CODE (op) == SUBREG)
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80 op = SUBREG_REG (op);
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81
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82 /* We don't consider registers whose class is NO_REGS
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83 to be a register operand. */
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84 return (GET_CODE (op) == REG
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85 && (REGNO (op) >= FIRST_PSEUDO_REGISTER
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86 || REGNO_REG_CLASS (REGNO (op)) == VFP_D0_D7_REGS
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87 || REGNO_REG_CLASS (REGNO (op)) == VFP_LO_REGS
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88 || (TARGET_VFPD32
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89 && REGNO_REG_CLASS (REGNO (op)) == VFP_REGS)));
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90 })
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91
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92 (define_special_predicate "subreg_lowpart_operator"
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93 (and (match_code "subreg")
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94 (match_test "subreg_lowpart_p (op)")))
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95
0
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96 ;; Reg, subreg(reg) or const_int.
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97 (define_predicate "reg_or_int_operand"
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98 (ior (match_code "const_int")
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99 (match_operand 0 "s_register_operand")))
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100
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101 (define_predicate "arm_immediate_operand"
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102 (and (match_code "const_int")
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103 (match_test "const_ok_for_arm (INTVAL (op))")))
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104
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105 ;; A constant value which fits into two instructions, each taking
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106 ;; an arithmetic constant operand for one of the words.
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107 (define_predicate "arm_immediate_di_operand"
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108 (and (match_code "const_int,const_double")
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109 (match_test "arm_const_double_by_immediates (op)")))
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110
0
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111 (define_predicate "arm_neg_immediate_operand"
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112 (and (match_code "const_int")
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113 (match_test "const_ok_for_arm (-INTVAL (op))")))
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114
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115 (define_predicate "arm_not_immediate_operand"
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116 (and (match_code "const_int")
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117 (match_test "const_ok_for_arm (~INTVAL (op))")))
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118
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119 (define_predicate "const0_operand"
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120 (and (match_code "const_int")
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121 (match_test "INTVAL (op) == 0")))
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122
0
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123 ;; Something valid on the RHS of an ARM data-processing instruction
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124 (define_predicate "arm_rhs_operand"
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125 (ior (match_operand 0 "s_register_operand")
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126 (match_operand 0 "arm_immediate_operand")))
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127
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128 (define_predicate "arm_rhsm_operand"
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129 (ior (match_operand 0 "arm_rhs_operand")
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130 (match_operand 0 "memory_operand")))
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131
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132 (define_predicate "shift_amount_operand"
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133 (ior (and (match_test "TARGET_ARM")
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134 (match_operand 0 "s_register_operand"))
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135 (match_operand 0 "const_int_operand")))
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136
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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137 (define_predicate "arm_add_operand"
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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138 (ior (match_operand 0 "arm_rhs_operand")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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139 (match_operand 0 "arm_neg_immediate_operand")))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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140
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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141 (define_predicate "arm_addimm_operand"
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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142 (ior (match_operand 0 "arm_immediate_operand")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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143 (match_operand 0 "arm_neg_immediate_operand")))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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144
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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145 (define_predicate "arm_not_operand"
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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146 (ior (match_operand 0 "arm_rhs_operand")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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147 (match_operand 0 "arm_not_immediate_operand")))
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148
67
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149 (define_predicate "arm_di_operand"
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150 (ior (match_operand 0 "s_register_operand")
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151 (match_operand 0 "arm_immediate_di_operand")))
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152
0
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153 ;; True if the operand is a memory reference which contains an
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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154 ;; offsettable address.
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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155 (define_predicate "offsettable_memory_operand"
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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156 (and (match_code "mem")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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157 (match_test
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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158 "offsettable_address_p (reload_completed | reload_in_progress,
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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159 mode, XEXP (op, 0))")))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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160
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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161 ;; True if the operand is a memory operand that does not have an
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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162 ;; automodified base register (and thus will not generate output reloads).
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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163 (define_predicate "call_memory_operand"
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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164 (and (match_code "mem")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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165 (and (match_test "GET_RTX_CLASS (GET_CODE (XEXP (op, 0)))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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166 != RTX_AUTOINC")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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167 (match_operand 0 "memory_operand"))))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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168
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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169 (define_predicate "arm_reload_memory_operand"
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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170 (and (match_code "mem,reg,subreg")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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171 (match_test "(!CONSTANT_P (op)
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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172 && (true_regnum(op) == -1
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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173 || (GET_CODE (op) == REG
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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174 && REGNO (op) >= FIRST_PSEUDO_REGISTER)))")))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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175
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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176 ;; True for valid operands for the rhs of an floating point insns.
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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177 ;; Allows regs or certain consts on FPA, just regs for everything else.
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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178 (define_predicate "arm_float_rhs_operand"
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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179 (ior (match_operand 0 "s_register_operand")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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180 (and (match_code "const_double")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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181 (match_test "TARGET_FPA && arm_const_double_rtx (op)"))))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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182
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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183 (define_predicate "arm_float_add_operand"
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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184 (ior (match_operand 0 "arm_float_rhs_operand")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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185 (and (match_code "const_double")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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186 (match_test "TARGET_FPA && neg_const_double_rtx_ok_for_fpa (op)"))))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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187
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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188 (define_predicate "vfp_compare_operand"
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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189 (ior (match_operand 0 "s_register_operand")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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190 (and (match_code "const_double")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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191 (match_test "arm_const_double_rtx (op)"))))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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192
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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193 (define_predicate "arm_float_compare_operand"
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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194 (if_then_else (match_test "TARGET_VFP")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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195 (match_operand 0 "vfp_compare_operand")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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196 (match_operand 0 "arm_float_rhs_operand")))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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197
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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198 ;; True for valid index operands.
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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199 (define_predicate "index_operand"
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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200 (ior (match_operand 0 "s_register_operand")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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201 (and (match_operand 0 "immediate_operand")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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202 (match_test "(GET_CODE (op) != CONST_INT
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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203 || (INTVAL (op) < 4096 && INTVAL (op) > -4096))"))))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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204
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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205 ;; True for operators that can be combined with a shift in ARM state.
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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206 (define_special_predicate "shiftable_operator"
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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207 (and (match_code "plus,minus,ior,xor,and")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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208 (match_test "mode == GET_MODE (op)")))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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209
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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210 ;; True for logical binary operators.
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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211 (define_special_predicate "logical_binary_operator"
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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212 (and (match_code "ior,xor,and")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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213 (match_test "mode == GET_MODE (op)")))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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214
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215 ;; True for commutative operators
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216 (define_special_predicate "commutative_binary_operator"
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217 (and (match_code "ior,xor,and,plus")
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218 (match_test "mode == GET_MODE (op)")))
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219
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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220 ;; True for shift operators.
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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221 (define_special_predicate "shift_operator"
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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222 (and (ior (ior (and (match_code "mult")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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223 (match_test "power_of_two_operand (XEXP (op, 1), mode)"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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224 (and (match_code "rotate")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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225 (match_test "GET_CODE (XEXP (op, 1)) == CONST_INT
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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226 && ((unsigned HOST_WIDE_INT) INTVAL (XEXP (op, 1))) < 32")))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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227 (match_code "ashift,ashiftrt,lshiftrt,rotatert"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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228 (match_test "mode == GET_MODE (op)")))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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229
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230 ;; True for MULT, to identify which variant of shift_operator is in use.
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231 (define_special_predicate "mult_operator"
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232 (match_code "mult"))
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233
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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234 ;; True for operators that have 16-bit thumb variants. */
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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235 (define_special_predicate "thumb_16bit_operator"
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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236 (match_code "plus,minus,and,ior,xor"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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237
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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238 ;; True for EQ & NE
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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239 (define_special_predicate "equality_operator"
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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240 (match_code "eq,ne"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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241
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parents: 0
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242 ;; True for integer comparisons and, if FP is active, for comparisons
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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243 ;; other than LTGT or UNEQ.
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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244 (define_special_predicate "arm_comparison_operator"
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
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245 (ior (match_code "eq,ne,le,lt,ge,gt,geu,gtu,leu,ltu")
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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246 (and (match_test "TARGET_32BIT && TARGET_HARD_FLOAT
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
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247 && (TARGET_FPA || TARGET_VFP)")
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
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248 (match_code "unordered,ordered,unlt,unle,unge,ungt"))))
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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249
63
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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250 (define_special_predicate "lt_ge_comparison_operator"
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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251 (match_code "lt,ge"))
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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252
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253 (define_special_predicate "noov_comparison_operator"
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nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
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254 (match_code "lt,ge,eq,ne"))
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255
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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256 (define_special_predicate "minmax_operator"
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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257 (and (match_code "smin,smax,umin,umax")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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258 (match_test "mode == GET_MODE (op)")))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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259
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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260 (define_special_predicate "cc_register"
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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261 (and (match_code "reg")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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262 (and (match_test "REGNO (op) == CC_REGNUM")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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263 (ior (match_test "mode == GET_MODE (op)")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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264 (match_test "mode == VOIDmode && GET_MODE_CLASS (GET_MODE (op)) == MODE_CC")))))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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265
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
266 (define_special_predicate "dominant_cc_register"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
267 (match_code "reg")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
268 {
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
269 if (mode == VOIDmode)
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
270 {
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
271 mode = GET_MODE (op);
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
272
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
273 if (GET_MODE_CLASS (mode) != MODE_CC)
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
274 return false;
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
275 }
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
276
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
277 return (cc_register (op, mode)
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
278 && (mode == CC_DNEmode
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
279 || mode == CC_DEQmode
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
280 || mode == CC_DLEmode
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
281 || mode == CC_DLTmode
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
282 || mode == CC_DGEmode
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
283 || mode == CC_DGTmode
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
284 || mode == CC_DLEUmode
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
285 || mode == CC_DLTUmode
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
286 || mode == CC_DGEUmode
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
287 || mode == CC_DGTUmode));
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
288 })
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
289
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
290 (define_special_predicate "arm_extendqisi_mem_op"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
291 (and (match_operand 0 "memory_operand")
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
292 (match_test "arm_legitimate_address_outer_p (mode, XEXP (op, 0),
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
293 SIGN_EXTEND, 0)")))
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
294
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
295 (define_special_predicate "arm_reg_or_extendqisi_mem_op"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
296 (ior (match_operand 0 "arm_extendqisi_mem_op")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
297 (match_operand 0 "s_register_operand")))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
298
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
299 (define_predicate "power_of_two_operand"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
300 (match_code "const_int")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
301 {
67
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
302 unsigned HOST_WIDE_INT value = INTVAL (op) & 0xffffffff;
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
303
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
304 return value != 0 && (value & (value - 1)) == 0;
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
305 })
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
306
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
307 (define_predicate "nonimmediate_di_operand"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
308 (match_code "reg,subreg,mem")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
309 {
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
310 if (s_register_operand (op, mode))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
311 return true;
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
312
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
313 if (GET_CODE (op) == SUBREG)
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
314 op = SUBREG_REG (op);
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
315
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
316 return GET_CODE (op) == MEM && memory_address_p (DImode, XEXP (op, 0));
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
317 })
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
318
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
319 (define_predicate "di_operand"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
320 (ior (match_code "const_int,const_double")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
321 (and (match_code "reg,subreg,mem")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
322 (match_operand 0 "nonimmediate_di_operand"))))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
323
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
324 (define_predicate "nonimmediate_soft_df_operand"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
325 (match_code "reg,subreg,mem")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
326 {
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
327 if (s_register_operand (op, mode))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
328 return true;
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
329
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
330 if (GET_CODE (op) == SUBREG)
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
331 op = SUBREG_REG (op);
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
332
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
333 return GET_CODE (op) == MEM && memory_address_p (DFmode, XEXP (op, 0));
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
334 })
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
335
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
336 (define_predicate "soft_df_operand"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
337 (ior (match_code "const_double")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
338 (and (match_code "reg,subreg,mem")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
339 (match_operand 0 "nonimmediate_soft_df_operand"))))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
340
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
341 (define_predicate "const_shift_operand"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
342 (and (match_code "const_int")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
343 (ior (match_operand 0 "power_of_two_operand")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
344 (match_test "((unsigned HOST_WIDE_INT) INTVAL (op)) < 32"))))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
345
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
346
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
347 (define_special_predicate "load_multiple_operation"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
348 (match_code "parallel")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
349 {
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
350 HOST_WIDE_INT count = XVECLEN (op, 0);
67
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
351 unsigned dest_regno;
0
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
352 rtx src_addr;
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
353 HOST_WIDE_INT i = 1, base = 0;
67
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
354 HOST_WIDE_INT offset = 0;
0
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
355 rtx elt;
67
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
356 bool addr_reg_loaded = false;
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
357 bool update = false;
0
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
358
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
359 if (count <= 1
67
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
360 || GET_CODE (XVECEXP (op, 0, 0)) != SET
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
361 || !REG_P (SET_DEST (XVECEXP (op, 0, 0))))
0
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
362 return false;
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
363
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
364 /* Check to see if this might be a write-back. */
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
365 if (GET_CODE (SET_SRC (elt = XVECEXP (op, 0, 0))) == PLUS)
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
366 {
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
367 i++;
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
368 base = 1;
67
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
369 update = true;
0
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
370
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
371 /* Now check it more carefully. */
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
372 if (GET_CODE (SET_DEST (elt)) != REG
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
373 || GET_CODE (XEXP (SET_SRC (elt), 0)) != REG
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
374 || GET_CODE (XEXP (SET_SRC (elt), 1)) != CONST_INT
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
375 || INTVAL (XEXP (SET_SRC (elt), 1)) != (count - 1) * 4)
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
376 return false;
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
377 }
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
378
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
379 /* Perform a quick check so we don't blow up below. */
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
380 if (count <= i
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
381 || GET_CODE (XVECEXP (op, 0, i - 1)) != SET
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
382 || GET_CODE (SET_DEST (XVECEXP (op, 0, i - 1))) != REG
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
383 || GET_CODE (SET_SRC (XVECEXP (op, 0, i - 1))) != MEM)
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
384 return false;
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
385
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
386 dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, i - 1)));
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
387 src_addr = XEXP (SET_SRC (XVECEXP (op, 0, i - 1)), 0);
67
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
388 if (GET_CODE (src_addr) == PLUS)
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
389 {
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
390 if (GET_CODE (XEXP (src_addr, 1)) != CONST_INT)
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
391 return false;
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
392 offset = INTVAL (XEXP (src_addr, 1));
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
393 src_addr = XEXP (src_addr, 0);
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
394 }
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
395 if (!REG_P (src_addr))
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
396 return false;
0
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
397
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
398 for (; i < count; i++)
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
399 {
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
400 elt = XVECEXP (op, 0, i);
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
401
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
402 if (GET_CODE (elt) != SET
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
403 || GET_CODE (SET_DEST (elt)) != REG
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
404 || GET_MODE (SET_DEST (elt)) != SImode
67
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
405 || REGNO (SET_DEST (elt)) <= dest_regno
0
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
406 || GET_CODE (SET_SRC (elt)) != MEM
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
407 || GET_MODE (SET_SRC (elt)) != SImode
67
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
408 || ((GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
409 || !rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr)
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
410 || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
411 || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1)) != offset + (i - base) * 4)
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
412 && (!REG_P (XEXP (SET_SRC (elt), 0))
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
413 || offset + (i - base) * 4 != 0)))
0
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
414 return false;
67
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
415 dest_regno = REGNO (SET_DEST (elt));
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
416 if (dest_regno == REGNO (src_addr))
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
417 addr_reg_loaded = true;
0
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
418 }
67
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
419 /* For Thumb, we only have updating instructions. If the pattern does
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
420 not describe an update, it must be because the address register is
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
421 in the list of loaded registers - on the hardware, this has the effect
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
422 of overriding the update. */
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
423 if (update && addr_reg_loaded)
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
424 return false;
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
425 if (TARGET_THUMB1)
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
426 return update || addr_reg_loaded;
0
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
427 return true;
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
428 })
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
429
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
430 (define_special_predicate "store_multiple_operation"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
431 (match_code "parallel")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
432 {
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
433 HOST_WIDE_INT count = XVECLEN (op, 0);
67
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
434 unsigned src_regno;
0
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
435 rtx dest_addr;
67
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
436 HOST_WIDE_INT i = 1, base = 0, offset = 0;
0
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
437 rtx elt;
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
438
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
439 if (count <= 1
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
440 || GET_CODE (XVECEXP (op, 0, 0)) != SET)
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
441 return false;
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
442
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
443 /* Check to see if this might be a write-back. */
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
444 if (GET_CODE (SET_SRC (elt = XVECEXP (op, 0, 0))) == PLUS)
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
445 {
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
446 i++;
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
447 base = 1;
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
448
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
449 /* Now check it more carefully. */
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
450 if (GET_CODE (SET_DEST (elt)) != REG
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
451 || GET_CODE (XEXP (SET_SRC (elt), 0)) != REG
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
452 || GET_CODE (XEXP (SET_SRC (elt), 1)) != CONST_INT
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
453 || INTVAL (XEXP (SET_SRC (elt), 1)) != (count - 1) * 4)
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
454 return false;
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
455 }
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
456
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
457 /* Perform a quick check so we don't blow up below. */
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
458 if (count <= i
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
459 || GET_CODE (XVECEXP (op, 0, i - 1)) != SET
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
460 || GET_CODE (SET_DEST (XVECEXP (op, 0, i - 1))) != MEM
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
461 || GET_CODE (SET_SRC (XVECEXP (op, 0, i - 1))) != REG)
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
462 return false;
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
463
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
464 src_regno = REGNO (SET_SRC (XVECEXP (op, 0, i - 1)));
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
465 dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, i - 1)), 0);
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
466
67
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
467 if (GET_CODE (dest_addr) == PLUS)
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
468 {
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
469 if (GET_CODE (XEXP (dest_addr, 1)) != CONST_INT)
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
470 return false;
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
471 offset = INTVAL (XEXP (dest_addr, 1));
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
472 dest_addr = XEXP (dest_addr, 0);
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
473 }
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
474 if (!REG_P (dest_addr))
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
475 return false;
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
476
0
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
477 for (; i < count; i++)
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
478 {
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
479 elt = XVECEXP (op, 0, i);
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
480
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
481 if (GET_CODE (elt) != SET
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
482 || GET_CODE (SET_SRC (elt)) != REG
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
483 || GET_MODE (SET_SRC (elt)) != SImode
67
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
484 || REGNO (SET_SRC (elt)) <= src_regno
0
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
485 || GET_CODE (SET_DEST (elt)) != MEM
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
486 || GET_MODE (SET_DEST (elt)) != SImode
67
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
487 || ((GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
488 || !rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr)
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
489 || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
490 || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1)) != offset + (i - base) * 4)
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
491 && (!REG_P (XEXP (SET_DEST (elt), 0))
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
492 || offset + (i - base) * 4 != 0)))
0
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
493 return false;
67
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
494 src_regno = REGNO (SET_SRC (elt));
0
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
495 }
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
496
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
497 return true;
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
498 })
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
499
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
500 (define_special_predicate "multi_register_push"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
501 (match_code "parallel")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
502 {
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
503 if ((GET_CODE (XVECEXP (op, 0, 0)) != SET)
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
504 || (GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != UNSPEC)
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
505 || (XINT (SET_SRC (XVECEXP (op, 0, 0)), 1) != UNSPEC_PUSH_MULT))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
506 return false;
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
507
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
508 return true;
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
509 })
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
510
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
511 ;;-------------------------------------------------------------------------
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
512 ;;
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
513 ;; Thumb predicates
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
514 ;;
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
515
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
516 (define_predicate "thumb1_cmp_operand"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
517 (ior (and (match_code "reg,subreg")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
518 (match_operand 0 "s_register_operand"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
519 (and (match_code "const_int")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
520 (match_test "((unsigned HOST_WIDE_INT) INTVAL (op)) < 256"))))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
521
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
522 (define_predicate "thumb1_cmpneg_operand"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
523 (and (match_code "const_int")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
524 (match_test "INTVAL (op) < 0 && INTVAL (op) > -256")))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
525
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
526 ;; Return TRUE if a result can be stored in OP without clobbering the
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
527 ;; condition code register. Prior to reload we only accept a
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
528 ;; register. After reload we have to be able to handle memory as
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
529 ;; well, since a pseudo may not get a hard reg and reload cannot
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
530 ;; handle output-reloads on jump insns.
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
531
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
532 ;; We could possibly handle mem before reload as well, but that might
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
533 ;; complicate things with the need to handle increment
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
534 ;; side-effects.
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
535 (define_predicate "thumb_cbrch_target_operand"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
536 (and (match_code "reg,subreg,mem")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
537 (ior (match_operand 0 "s_register_operand")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
538 (and (match_test "reload_in_progress || reload_completed")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
539 (match_operand 0 "memory_operand")))))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
540
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
541 ;;-------------------------------------------------------------------------
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
542 ;;
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
543 ;; MAVERICK predicates
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
544 ;;
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
545
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
546 (define_predicate "cirrus_register_operand"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
547 (match_code "reg,subreg")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
548 {
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
549 if (GET_CODE (op) == SUBREG)
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
550 op = SUBREG_REG (op);
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
551
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
552 return (GET_CODE (op) == REG
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
553 && (REGNO_REG_CLASS (REGNO (op)) == CIRRUS_REGS
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
554 || REGNO_REG_CLASS (REGNO (op)) == GENERAL_REGS));
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
555 })
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
556
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
557 (define_predicate "cirrus_fp_register"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
558 (match_code "reg,subreg")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
559 {
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
560 if (GET_CODE (op) == SUBREG)
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
561 op = SUBREG_REG (op);
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
562
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
563 return (GET_CODE (op) == REG
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
564 && (REGNO (op) >= FIRST_PSEUDO_REGISTER
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
565 || REGNO_REG_CLASS (REGNO (op)) == CIRRUS_REGS));
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
566 })
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
567
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
568 (define_predicate "cirrus_shift_const"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
569 (and (match_code "const_int")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
570 (match_test "((unsigned HOST_WIDE_INT) INTVAL (op)) < 64")))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
571
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
572
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
573 ;; Neon predicates
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
574
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
575 (define_predicate "const_multiple_of_8_operand"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
576 (match_code "const_int")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
577 {
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
578 unsigned HOST_WIDE_INT val = INTVAL (op);
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
579 return (val & 7) == 0;
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
580 })
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
581
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
582 (define_predicate "imm_for_neon_mov_operand"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
583 (match_code "const_vector")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
584 {
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
585 return neon_immediate_valid_for_move (op, mode, NULL, NULL);
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
586 })
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
587
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
588 (define_predicate "imm_for_neon_logic_operand"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
589 (match_code "const_vector")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
590 {
67
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
591 return (TARGET_NEON
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
592 && neon_immediate_valid_for_logic (op, mode, 0, NULL, NULL));
0
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
593 })
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
594
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
595 (define_predicate "imm_for_neon_inv_logic_operand"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
596 (match_code "const_vector")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
597 {
67
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
598 return (TARGET_NEON
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
599 && neon_immediate_valid_for_logic (op, mode, 1, NULL, NULL));
0
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
600 })
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
601
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
602 (define_predicate "neon_logic_op2"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
603 (ior (match_operand 0 "imm_for_neon_logic_operand")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
604 (match_operand 0 "s_register_operand")))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
605
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
606 (define_predicate "neon_inv_logic_op2"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
607 (ior (match_operand 0 "imm_for_neon_inv_logic_operand")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
608 (match_operand 0 "s_register_operand")))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
609
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
610 ;; TODO: We could check lane numbers more precisely based on the mode.
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
611 (define_predicate "neon_lane_number"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
612 (and (match_code "const_int")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
613 (match_test "INTVAL (op) >= 0 && INTVAL (op) <= 7")))
67
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
614 ;; Predicates for named expanders that overlap multiple ISAs.
0
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
615
67
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
616 (define_predicate "cmpdi_operand"
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
617 (if_then_else (match_test "TARGET_HARD_FLOAT && TARGET_MAVERICK")
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
618 (and (match_test "TARGET_ARM")
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
619 (match_operand 0 "cirrus_fp_register"))
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
620 (and (match_test "TARGET_32BIT")
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
621 (match_operand 0 "arm_di_operand"))))
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
622
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
623 ;; True if the operand is memory reference suitable for a ldrex/strex.
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
624 (define_predicate "arm_sync_memory_operand"
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
625 (and (match_operand 0 "memory_operand")
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
626 (match_code "reg" "0")))
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
627
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
628 ;; Predicates for parallel expanders based on mode.
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
629 (define_special_predicate "vect_par_constant_high"
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
630 (match_code "parallel")
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
631 {
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
632 HOST_WIDE_INT count = XVECLEN (op, 0);
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
633 int i;
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
634 int base = GET_MODE_NUNITS (mode);
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
635
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
636 if ((count < 1)
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
637 || (count != base/2))
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
638 return false;
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
639
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
640 if (!VECTOR_MODE_P (mode))
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
641 return false;
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
642
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
643 for (i = 0; i < count; i++)
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
644 {
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
645 rtx elt = XVECEXP (op, 0, i);
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
646 int val;
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
647
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
648 if (GET_CODE (elt) != CONST_INT)
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
649 return false;
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
650
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
651 val = INTVAL (elt);
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
652 if (val != (base/2) + i)
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
653 return false;
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
654 }
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
655 return true;
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
656 })
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
657
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
658 (define_special_predicate "vect_par_constant_low"
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
659 (match_code "parallel")
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
660 {
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
661 HOST_WIDE_INT count = XVECLEN (op, 0);
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
662 int i;
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
663 int base = GET_MODE_NUNITS (mode);
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
664
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
665 if ((count < 1)
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
666 || (count != base/2))
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
667 return false;
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
668
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
669 if (!VECTOR_MODE_P (mode))
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
670 return false;
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
671
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
672 for (i = 0; i < count; i++)
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
673 {
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
674 rtx elt = XVECEXP (op, 0, i);
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
675 int val;
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
676
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
677 if (GET_CODE (elt) != CONST_INT)
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
678 return false;
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
679
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
680 val = INTVAL (elt);
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
681 if (val != i)
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
682 return false;
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
683 }
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
684 return true;
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
685 })