Mercurial > hg > CbC > CbC_gcc
annotate gcc/config/avr/avr.h @ 67:f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
author | nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp> |
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date | Tue, 22 Mar 2011 17:18:12 +0900 |
parents | b7f97abdc517 |
children | 04ced10e8804 |
rev | line source |
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0 | 1 /* Definitions of target machine for GNU compiler, |
2 for ATMEL AVR at90s8515, ATmega103/103L, ATmega603/603L microcontrollers. | |
3 Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, | |
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4 2008, 2009, 2010, 2011 |
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5 Free Software Foundation, Inc. |
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6 Contributed by Denis Chertykov (chertykov@gmail.com) |
0 | 7 |
8 This file is part of GCC. | |
9 | |
10 GCC is free software; you can redistribute it and/or modify | |
11 it under the terms of the GNU General Public License as published by | |
12 the Free Software Foundation; either version 3, or (at your option) | |
13 any later version. | |
14 | |
15 GCC is distributed in the hope that it will be useful, | |
16 but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 GNU General Public License for more details. | |
19 | |
20 You should have received a copy of the GNU General Public License | |
21 along with GCC; see the file COPYING3. If not see | |
22 <http://www.gnu.org/licenses/>. */ | |
23 | |
24 /* Names to predefine in the preprocessor for this target machine. */ | |
25 | |
26 struct base_arch_s { | |
27 /* Assembler only. */ | |
28 int asm_only; | |
29 | |
30 /* Core have 'MUL*' instructions. */ | |
31 int have_mul; | |
32 | |
33 /* Core have 'CALL' and 'JMP' instructions. */ | |
34 int have_jmp_call; | |
35 | |
36 /* Core have 'MOVW' and 'LPM Rx,Z' instructions. */ | |
37 int have_movw_lpmx; | |
38 | |
39 /* Core have 'ELPM' instructions. */ | |
40 int have_elpm; | |
41 | |
42 /* Core have 'ELPM Rx,Z' instructions. */ | |
43 int have_elpmx; | |
44 | |
45 /* Core have 'EICALL' and 'EIJMP' instructions. */ | |
46 int have_eijmp_eicall; | |
47 | |
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48 /* Reserved for xmega architecture. */ |
0 | 49 int reserved; |
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50 |
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51 /* Reserved for xmega architecture. */ |
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52 int reserved2; |
0 | 53 |
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54 /* Default start of data section address for architecture. */ |
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55 int default_data_section_start; |
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56 |
0 | 57 const char *const macro; |
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58 |
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59 /* Architecture name. */ |
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60 const char *const arch_name; |
0 | 61 }; |
62 | |
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63 /* These names are used as the index into the avr_arch_types[] table |
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64 above. */ |
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65 |
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66 enum avr_arch |
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67 { |
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68 ARCH_UNKNOWN, |
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69 ARCH_AVR1, |
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70 ARCH_AVR2, |
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71 ARCH_AVR25, |
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72 ARCH_AVR3, |
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73 ARCH_AVR31, |
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74 ARCH_AVR35, |
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75 ARCH_AVR4, |
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76 ARCH_AVR5, |
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77 ARCH_AVR51, |
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78 ARCH_AVR6 |
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79 }; |
0 | 80 |
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81 struct mcu_type_s { |
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82 /* Device name. */ |
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83 const char *const name; |
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84 |
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85 /* Index in avr_arch_types[]. */ |
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86 int arch; |
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87 |
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88 /* Must lie outside user's namespace. NULL == no macro. */ |
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89 const char *const macro; |
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90 |
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91 /* Stack pointer have 8 bits width. */ |
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92 int short_sp; |
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93 |
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94 /* Start of data section. */ |
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95 int data_section_start; |
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96 |
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97 /* Name of device library. */ |
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98 const char *const library_name; |
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99 }; |
0 | 100 |
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101 /* Preprocessor macros to define depending on MCU type. */ |
0 | 102 extern const char *avr_extra_arch_macro; |
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103 extern const struct base_arch_s *avr_current_arch; |
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104 extern const struct mcu_type_s *avr_current_device; |
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105 extern const struct mcu_type_s avr_mcu_types[]; |
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106 extern const struct base_arch_s avr_arch_types[]; |
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107 |
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108 #define TARGET_CPU_CPP_BUILTINS() avr_cpu_cpp_builtins (pfile) |
0 | 109 |
110 #if !defined(IN_LIBGCC2) && !defined(IN_TARGET_LIBS) | |
111 extern GTY(()) section *progmem_section; | |
112 #endif | |
113 | |
114 #define AVR_HAVE_JMP_CALL (avr_current_arch->have_jmp_call && !TARGET_SHORT_CALLS) | |
115 #define AVR_HAVE_MUL (avr_current_arch->have_mul) | |
116 #define AVR_HAVE_MOVW (avr_current_arch->have_movw_lpmx) | |
117 #define AVR_HAVE_LPMX (avr_current_arch->have_movw_lpmx) | |
118 #define AVR_HAVE_RAMPZ (avr_current_arch->have_elpm) | |
119 #define AVR_HAVE_EIJMP_EICALL (avr_current_arch->have_eijmp_eicall) | |
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120 #define AVR_HAVE_8BIT_SP (avr_current_device->short_sp || TARGET_TINY_STACK) |
0 | 121 |
122 #define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL) | |
123 #define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL) | |
124 | |
125 #define TARGET_VERSION fprintf (stderr, " (GNU assembler syntax)"); | |
126 | |
127 #define BITS_BIG_ENDIAN 0 | |
128 #define BYTES_BIG_ENDIAN 0 | |
129 #define WORDS_BIG_ENDIAN 0 | |
130 | |
131 #ifdef IN_LIBGCC2 | |
132 /* This is to get correct SI and DI modes in libgcc2.c (32 and 64 bits). */ | |
133 #define UNITS_PER_WORD 4 | |
134 #else | |
135 /* Width of a word, in units (bytes). */ | |
136 #define UNITS_PER_WORD 1 | |
137 #endif | |
138 | |
139 #define POINTER_SIZE 16 | |
140 | |
141 | |
142 /* Maximum sized of reasonable data type | |
143 DImode or Dfmode ... */ | |
144 #define MAX_FIXED_MODE_SIZE 32 | |
145 | |
146 #define PARM_BOUNDARY 8 | |
147 | |
148 #define FUNCTION_BOUNDARY 8 | |
149 | |
150 #define EMPTY_FIELD_BOUNDARY 8 | |
151 | |
152 /* No data type wants to be aligned rounder than this. */ | |
153 #define BIGGEST_ALIGNMENT 8 | |
154 | |
155 #define MAX_OFILE_ALIGNMENT (32768 * 8) | |
156 | |
157 #define TARGET_VTABLE_ENTRY_ALIGN 8 | |
158 | |
159 #define STRICT_ALIGNMENT 0 | |
160 | |
161 #define INT_TYPE_SIZE (TARGET_INT8 ? 8 : 16) | |
162 #define SHORT_TYPE_SIZE (INT_TYPE_SIZE == 8 ? INT_TYPE_SIZE : 16) | |
163 #define LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 16 : 32) | |
164 #define LONG_LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 32 : 64) | |
165 #define FLOAT_TYPE_SIZE 32 | |
166 #define DOUBLE_TYPE_SIZE 32 | |
167 #define LONG_DOUBLE_TYPE_SIZE 32 | |
168 | |
169 #define DEFAULT_SIGNED_CHAR 1 | |
170 | |
171 #define SIZE_TYPE (INT_TYPE_SIZE == 8 ? "long unsigned int" : "unsigned int") | |
172 #define PTRDIFF_TYPE (INT_TYPE_SIZE == 8 ? "long int" :"int") | |
173 | |
174 #define WCHAR_TYPE_SIZE 16 | |
175 | |
176 #define FIRST_PSEUDO_REGISTER 36 | |
177 | |
178 #define FIXED_REGISTERS {\ | |
179 1,1,/* r0 r1 */\ | |
180 0,0,/* r2 r3 */\ | |
181 0,0,/* r4 r5 */\ | |
182 0,0,/* r6 r7 */\ | |
183 0,0,/* r8 r9 */\ | |
184 0,0,/* r10 r11 */\ | |
185 0,0,/* r12 r13 */\ | |
186 0,0,/* r14 r15 */\ | |
187 0,0,/* r16 r17 */\ | |
188 0,0,/* r18 r19 */\ | |
189 0,0,/* r20 r21 */\ | |
190 0,0,/* r22 r23 */\ | |
191 0,0,/* r24 r25 */\ | |
192 0,0,/* r26 r27 */\ | |
193 0,0,/* r28 r29 */\ | |
194 0,0,/* r30 r31 */\ | |
195 1,1,/* STACK */\ | |
196 1,1 /* arg pointer */ } | |
197 | |
198 #define CALL_USED_REGISTERS { \ | |
199 1,1,/* r0 r1 */ \ | |
200 0,0,/* r2 r3 */ \ | |
201 0,0,/* r4 r5 */ \ | |
202 0,0,/* r6 r7 */ \ | |
203 0,0,/* r8 r9 */ \ | |
204 0,0,/* r10 r11 */ \ | |
205 0,0,/* r12 r13 */ \ | |
206 0,0,/* r14 r15 */ \ | |
207 0,0,/* r16 r17 */ \ | |
208 1,1,/* r18 r19 */ \ | |
209 1,1,/* r20 r21 */ \ | |
210 1,1,/* r22 r23 */ \ | |
211 1,1,/* r24 r25 */ \ | |
212 1,1,/* r26 r27 */ \ | |
213 0,0,/* r28 r29 */ \ | |
214 1,1,/* r30 r31 */ \ | |
215 1,1,/* STACK */ \ | |
216 1,1 /* arg pointer */ } | |
217 | |
218 #define REG_ALLOC_ORDER { \ | |
219 24,25, \ | |
220 18,19, \ | |
221 20,21, \ | |
222 22,23, \ | |
223 30,31, \ | |
224 26,27, \ | |
225 28,29, \ | |
226 17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2, \ | |
227 0,1, \ | |
228 32,33,34,35 \ | |
229 } | |
230 | |
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231 #define ADJUST_REG_ALLOC_ORDER order_regs_for_local_alloc () |
0 | 232 |
233 | |
234 #define HARD_REGNO_NREGS(REGNO, MODE) ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
235 | |
236 #define HARD_REGNO_MODE_OK(REGNO, MODE) avr_hard_regno_mode_ok(REGNO, MODE) | |
237 | |
238 #define MODES_TIEABLE_P(MODE1, MODE2) 1 | |
239 | |
240 enum reg_class { | |
241 NO_REGS, | |
242 R0_REG, /* r0 */ | |
243 POINTER_X_REGS, /* r26 - r27 */ | |
244 POINTER_Y_REGS, /* r28 - r29 */ | |
245 POINTER_Z_REGS, /* r30 - r31 */ | |
246 STACK_REG, /* STACK */ | |
247 BASE_POINTER_REGS, /* r28 - r31 */ | |
248 POINTER_REGS, /* r26 - r31 */ | |
249 ADDW_REGS, /* r24 - r31 */ | |
250 SIMPLE_LD_REGS, /* r16 - r23 */ | |
251 LD_REGS, /* r16 - r31 */ | |
252 NO_LD_REGS, /* r0 - r15 */ | |
253 GENERAL_REGS, /* r0 - r31 */ | |
254 ALL_REGS, LIM_REG_CLASSES | |
255 }; | |
256 | |
257 | |
258 #define N_REG_CLASSES (int)LIM_REG_CLASSES | |
259 | |
260 #define REG_CLASS_NAMES { \ | |
261 "NO_REGS", \ | |
262 "R0_REG", /* r0 */ \ | |
263 "POINTER_X_REGS", /* r26 - r27 */ \ | |
264 "POINTER_Y_REGS", /* r28 - r29 */ \ | |
265 "POINTER_Z_REGS", /* r30 - r31 */ \ | |
266 "STACK_REG", /* STACK */ \ | |
267 "BASE_POINTER_REGS", /* r28 - r31 */ \ | |
268 "POINTER_REGS", /* r26 - r31 */ \ | |
269 "ADDW_REGS", /* r24 - r31 */ \ | |
270 "SIMPLE_LD_REGS", /* r16 - r23 */ \ | |
271 "LD_REGS", /* r16 - r31 */ \ | |
272 "NO_LD_REGS", /* r0 - r15 */ \ | |
273 "GENERAL_REGS", /* r0 - r31 */ \ | |
274 "ALL_REGS" } | |
275 | |
276 #define REG_CLASS_CONTENTS { \ | |
277 {0x00000000,0x00000000}, /* NO_REGS */ \ | |
278 {0x00000001,0x00000000}, /* R0_REG */ \ | |
279 {3 << REG_X,0x00000000}, /* POINTER_X_REGS, r26 - r27 */ \ | |
280 {3 << REG_Y,0x00000000}, /* POINTER_Y_REGS, r28 - r29 */ \ | |
281 {3 << REG_Z,0x00000000}, /* POINTER_Z_REGS, r30 - r31 */ \ | |
282 {0x00000000,0x00000003}, /* STACK_REG, STACK */ \ | |
283 {(3 << REG_Y) | (3 << REG_Z), \ | |
284 0x00000000}, /* BASE_POINTER_REGS, r28 - r31 */ \ | |
285 {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z), \ | |
286 0x00000000}, /* POINTER_REGS, r26 - r31 */ \ | |
287 {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z) | (3 << REG_W), \ | |
288 0x00000000}, /* ADDW_REGS, r24 - r31 */ \ | |
289 {0x00ff0000,0x00000000}, /* SIMPLE_LD_REGS r16 - r23 */ \ | |
290 {(3 << REG_X)|(3 << REG_Y)|(3 << REG_Z)|(3 << REG_W)|(0xff << 16), \ | |
291 0x00000000}, /* LD_REGS, r16 - r31 */ \ | |
292 {0x0000ffff,0x00000000}, /* NO_LD_REGS r0 - r15 */ \ | |
293 {0xffffffff,0x00000000}, /* GENERAL_REGS, r0 - r31 */ \ | |
294 {0xffffffff,0x00000003} /* ALL_REGS */ \ | |
295 } | |
296 | |
297 #define REGNO_REG_CLASS(R) avr_regno_reg_class(R) | |
298 | |
299 /* The following macro defines cover classes for Integrated Register | |
300 Allocator. Cover classes is a set of non-intersected register | |
301 classes covering all hard registers used for register allocation | |
302 purpose. Any move between two registers of a cover class should be | |
303 cheaper than load or store of the registers. The macro value is | |
304 array of register classes with LIM_REG_CLASSES used as the end | |
305 marker. */ | |
306 | |
307 #define IRA_COVER_CLASSES \ | |
308 { \ | |
309 GENERAL_REGS, LIM_REG_CLASSES \ | |
310 } | |
311 | |
312 #define BASE_REG_CLASS (reload_completed ? BASE_POINTER_REGS : POINTER_REGS) | |
313 | |
314 #define INDEX_REG_CLASS NO_REGS | |
315 | |
316 #define REGNO_OK_FOR_BASE_P(r) (((r) < FIRST_PSEUDO_REGISTER \ | |
317 && ((r) == REG_X \ | |
318 || (r) == REG_Y \ | |
319 || (r) == REG_Z \ | |
320 || (r) == ARG_POINTER_REGNUM)) \ | |
321 || (reg_renumber \ | |
322 && (reg_renumber[r] == REG_X \ | |
323 || reg_renumber[r] == REG_Y \ | |
324 || reg_renumber[r] == REG_Z \ | |
325 || (reg_renumber[r] \ | |
326 == ARG_POINTER_REGNUM)))) | |
327 | |
328 #define REGNO_OK_FOR_INDEX_P(NUM) 0 | |
329 | |
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330 #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true |
0 | 331 |
332 #define CLASS_MAX_NREGS(CLASS, MODE) class_max_nregs (CLASS, MODE) | |
333 | |
334 #define STACK_PUSH_CODE POST_DEC | |
335 | |
336 #define STACK_GROWS_DOWNWARD | |
337 | |
338 #define STARTING_FRAME_OFFSET 1 | |
339 | |
340 #define STACK_POINTER_OFFSET 1 | |
341 | |
342 #define FIRST_PARM_OFFSET(FUNDECL) 0 | |
343 | |
344 #define STACK_BOUNDARY 8 | |
345 | |
346 #define STACK_POINTER_REGNUM 32 | |
347 | |
348 #define FRAME_POINTER_REGNUM REG_Y | |
349 | |
350 #define ARG_POINTER_REGNUM 34 | |
351 | |
352 #define STATIC_CHAIN_REGNUM 2 | |
353 | |
354 /* Offset from the frame pointer register value to the top of the stack. */ | |
355 #define FRAME_POINTER_CFA_OFFSET(FNDECL) 0 | |
356 | |
357 #define ELIMINABLE_REGS { \ | |
358 {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ | |
359 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM} \ | |
360 ,{FRAME_POINTER_REGNUM+1,STACK_POINTER_REGNUM+1}} | |
361 | |
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362 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ |
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363 OFFSET = avr_initial_elimination_offset (FROM, TO) |
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365 #define RETURN_ADDR_RTX(count, tem) avr_return_addr_rtx (count, tem) |
0 | 366 |
367 /* Don't use Push rounding. expr.c: emit_single_push_insn is broken | |
368 for POST_DEC targets (PR27386). */ | |
369 /*#define PUSH_ROUNDING(NPUSHED) (NPUSHED)*/ | |
370 | |
371 typedef struct avr_args { | |
372 int nregs; /* # registers available for passing */ | |
373 int regno; /* next available register number */ | |
374 } CUMULATIVE_ARGS; | |
375 | |
376 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \ | |
377 init_cumulative_args (&(CUM), FNTYPE, LIBNAME, FNDECL) | |
378 | |
379 #define FUNCTION_ARG_REGNO_P(r) function_arg_regno_p(r) | |
380 | |
381 extern int avr_reg_order[]; | |
382 | |
383 #define RET_REGISTER avr_ret_register () | |
384 | |
385 #define LIBCALL_VALUE(MODE) avr_libcall_value (MODE) | |
386 | |
387 #define FUNCTION_VALUE_REGNO_P(N) ((int) (N) == RET_REGISTER) | |
388 | |
389 #define DEFAULT_PCC_STRUCT_RETURN 0 | |
390 | |
391 #define EPILOGUE_USES(REGNO) avr_epilogue_uses(REGNO) | |
392 | |
393 #define HAVE_POST_INCREMENT 1 | |
394 #define HAVE_PRE_DECREMENT 1 | |
395 | |
396 #define MAX_REGS_PER_ADDRESS 1 | |
397 | |
398 #define REG_OK_FOR_BASE_NOSTRICT_P(X) \ | |
399 (REGNO (X) >= FIRST_PSEUDO_REGISTER || REG_OK_FOR_BASE_STRICT_P(X)) | |
400 | |
401 #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) | |
402 | |
403 /* LEGITIMIZE_RELOAD_ADDRESS will allow register R26/27 to be used, where it | |
404 is no worse than normal base pointers R28/29 and R30/31. For example: | |
405 If base offset is greater than 63 bytes or for R++ or --R addressing. */ | |
406 | |
407 #define LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND_LEVELS, WIN) \ | |
408 do { \ | |
409 if (1&&(GET_CODE (X) == POST_INC || GET_CODE (X) == PRE_DEC)) \ | |
410 { \ | |
411 push_reload (XEXP (X,0), XEXP (X,0), &XEXP (X,0), &XEXP (X,0), \ | |
412 POINTER_REGS, GET_MODE (X),GET_MODE (X) , 0, 0, \ | |
413 OPNUM, RELOAD_OTHER); \ | |
414 goto WIN; \ | |
415 } \ | |
416 if (GET_CODE (X) == PLUS \ | |
417 && REG_P (XEXP (X, 0)) \ | |
418 && reg_equiv_constant[REGNO (XEXP (X, 0))] == 0 \ | |
419 && GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
420 && INTVAL (XEXP (X, 1)) >= 1) \ | |
421 { \ | |
422 int fit = INTVAL (XEXP (X, 1)) <= (64 - GET_MODE_SIZE (MODE)); \ | |
423 if (fit) \ | |
424 { \ | |
425 if (reg_equiv_address[REGNO (XEXP (X, 0))] != 0) \ | |
426 { \ | |
427 int regno = REGNO (XEXP (X, 0)); \ | |
428 rtx mem = make_memloc (X, regno); \ | |
429 push_reload (XEXP (mem,0), NULL, &XEXP (mem,0), NULL, \ | |
430 POINTER_REGS, Pmode, VOIDmode, 0, 0, \ | |
431 1, ADDR_TYPE (TYPE)); \ | |
432 push_reload (mem, NULL_RTX, &XEXP (X, 0), NULL, \ | |
433 BASE_POINTER_REGS, GET_MODE (X), VOIDmode, 0, 0, \ | |
434 OPNUM, TYPE); \ | |
435 goto WIN; \ | |
436 } \ | |
437 } \ | |
438 else if (! (frame_pointer_needed && XEXP (X,0) == frame_pointer_rtx)) \ | |
439 { \ | |
440 push_reload (X, NULL_RTX, &X, NULL, \ | |
441 POINTER_REGS, GET_MODE (X), VOIDmode, 0, 0, \ | |
442 OPNUM, TYPE); \ | |
443 goto WIN; \ | |
444 } \ | |
445 } \ | |
446 } while(0) | |
447 | |
448 #define LEGITIMATE_CONSTANT_P(X) 1 | |
449 | |
450 #define BRANCH_COST(speed_p, predictable_p) 0 | |
451 | |
452 #define SLOW_BYTE_ACCESS 0 | |
453 | |
454 #define NO_FUNCTION_CSE | |
455 | |
456 #define TEXT_SECTION_ASM_OP "\t.text" | |
457 | |
458 #define DATA_SECTION_ASM_OP "\t.data" | |
459 | |
460 #define BSS_SECTION_ASM_OP "\t.section .bss" | |
461 | |
462 /* Define the pseudo-ops used to switch to the .ctors and .dtors sections. | |
463 There are no shared libraries on this target, and these sections are | |
464 placed in the read-only program memory, so they are not writable. */ | |
465 | |
466 #undef CTORS_SECTION_ASM_OP | |
467 #define CTORS_SECTION_ASM_OP "\t.section .ctors,\"a\",@progbits" | |
468 | |
469 #undef DTORS_SECTION_ASM_OP | |
470 #define DTORS_SECTION_ASM_OP "\t.section .dtors,\"a\",@progbits" | |
471 | |
472 #define TARGET_ASM_CONSTRUCTOR avr_asm_out_ctor | |
473 | |
474 #define TARGET_ASM_DESTRUCTOR avr_asm_out_dtor | |
475 | |
476 #define SUPPORTS_INIT_PRIORITY 0 | |
477 | |
478 #define JUMP_TABLES_IN_TEXT_SECTION 0 | |
479 | |
480 #define ASM_COMMENT_START " ; " | |
481 | |
482 #define ASM_APP_ON "/* #APP */\n" | |
483 | |
484 #define ASM_APP_OFF "/* #NOAPP */\n" | |
485 | |
486 /* Switch into a generic section. */ | |
487 #define TARGET_ASM_NAMED_SECTION default_elf_asm_named_section | |
488 #define TARGET_ASM_INIT_SECTIONS avr_asm_init_sections | |
489 | |
490 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) gas_output_ascii (FILE,P,SIZE) | |
491 | |
492 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '\n' || ((C) == '$')) | |
493 | |
494 #define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \ | |
495 do { \ | |
496 fputs ("\t.comm ", (STREAM)); \ | |
497 assemble_name ((STREAM), (NAME)); \ | |
498 fprintf ((STREAM), ",%lu,1\n", (unsigned long)(SIZE)); \ | |
499 } while (0) | |
500 | |
501 #define ASM_OUTPUT_BSS(FILE, DECL, NAME, SIZE, ROUNDED) \ | |
502 asm_output_bss ((FILE), (DECL), (NAME), (SIZE), (ROUNDED)) | |
503 | |
504 #define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED) \ | |
505 do { \ | |
506 fputs ("\t.lcomm ", (STREAM)); \ | |
507 assemble_name ((STREAM), (NAME)); \ | |
508 fprintf ((STREAM), ",%d\n", (int)(SIZE)); \ | |
509 } while (0) | |
510 | |
511 #undef TYPE_ASM_OP | |
512 #undef SIZE_ASM_OP | |
513 #undef WEAK_ASM_OP | |
514 #define TYPE_ASM_OP "\t.type\t" | |
515 #define SIZE_ASM_OP "\t.size\t" | |
516 #define WEAK_ASM_OP "\t.weak\t" | |
517 /* Define the strings used for the special svr4 .type and .size directives. | |
518 These strings generally do not vary from one system running svr4 to | |
519 another, but if a given system (e.g. m88k running svr) needs to use | |
520 different pseudo-op names for these, they may be overridden in the | |
521 file which includes this one. */ | |
522 | |
523 | |
524 #undef TYPE_OPERAND_FMT | |
525 #define TYPE_OPERAND_FMT "@%s" | |
526 /* The following macro defines the format used to output the second | |
527 operand of the .type assembler directive. Different svr4 assemblers | |
528 expect various different forms for this operand. The one given here | |
529 is just a default. You may need to override it in your machine- | |
530 specific tm.h file (depending upon the particulars of your assembler). */ | |
531 | |
532 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \ | |
533 avr_asm_declare_function_name ((FILE), (NAME), (DECL)) | |
534 | |
535 #define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL) \ | |
536 do { \ | |
537 if (!flag_inhibit_size_directive) \ | |
538 ASM_OUTPUT_MEASURED_SIZE (FILE, FNAME); \ | |
539 } while (0) | |
540 | |
541 #define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \ | |
542 do { \ | |
543 ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object"); \ | |
544 size_directive_output = 0; \ | |
545 if (!flag_inhibit_size_directive && DECL_SIZE (DECL)) \ | |
546 { \ | |
547 size_directive_output = 1; \ | |
548 ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, \ | |
549 int_size_in_bytes (TREE_TYPE (DECL))); \ | |
550 } \ | |
551 ASM_OUTPUT_LABEL(FILE, NAME); \ | |
552 } while (0) | |
553 | |
554 #undef ASM_FINISH_DECLARE_OBJECT | |
555 #define ASM_FINISH_DECLARE_OBJECT(FILE, DECL, TOP_LEVEL, AT_END) \ | |
556 do { \ | |
557 const char *name = XSTR (XEXP (DECL_RTL (DECL), 0), 0); \ | |
558 HOST_WIDE_INT size; \ | |
559 if (!flag_inhibit_size_directive && DECL_SIZE (DECL) \ | |
560 && ! AT_END && TOP_LEVEL \ | |
561 && DECL_INITIAL (DECL) == error_mark_node \ | |
562 && !size_directive_output) \ | |
563 { \ | |
564 size_directive_output = 1; \ | |
565 size = int_size_in_bytes (TREE_TYPE (DECL)); \ | |
566 ASM_OUTPUT_SIZE_DIRECTIVE (FILE, name, size); \ | |
567 } \ | |
568 } while (0) | |
569 | |
570 | |
571 #define ESCAPES \ | |
572 "\1\1\1\1\1\1\1\1btn\1fr\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\ | |
573 \0\0\"\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\ | |
574 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\\\0\0\0\ | |
575 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\1\ | |
576 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\ | |
577 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\ | |
578 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\ | |
579 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1" | |
580 /* A table of bytes codes used by the ASM_OUTPUT_ASCII and | |
581 ASM_OUTPUT_LIMITED_STRING macros. Each byte in the table | |
582 corresponds to a particular byte value [0..255]. For any | |
583 given byte value, if the value in the corresponding table | |
584 position is zero, the given character can be output directly. | |
585 If the table value is 1, the byte must be output as a \ooo | |
586 octal escape. If the tables value is anything else, then the | |
587 byte value should be output as a \ followed by the value | |
588 in the table. Note that we can use standard UN*X escape | |
589 sequences for many control characters, but we don't use | |
590 \a to represent BEL because some svr4 assemblers (e.g. on | |
591 the i386) don't know about that. Also, we don't use \v | |
592 since some versions of gas, such as 2.2 did not accept it. */ | |
593 | |
594 #define STRING_LIMIT ((unsigned) 64) | |
595 #define STRING_ASM_OP "\t.string\t" | |
596 /* Some svr4 assemblers have a limit on the number of characters which | |
597 can appear in the operand of a .string directive. If your assembler | |
598 has such a limitation, you should define STRING_LIMIT to reflect that | |
599 limit. Note that at least some svr4 assemblers have a limit on the | |
600 actual number of bytes in the double-quoted string, and that they | |
601 count each character in an escape sequence as one byte. Thus, an | |
602 escape sequence like \377 would count as four bytes. | |
603 | |
604 If your target assembler doesn't support the .string directive, you | |
605 should define this to zero. */ | |
606 | |
607 /* Globalizing directive for a label. */ | |
608 #define GLOBAL_ASM_OP ".global\t" | |
609 | |
610 #define SET_ASM_OP "\t.set\t" | |
611 | |
612 #define ASM_WEAKEN_LABEL(FILE, NAME) \ | |
613 do \ | |
614 { \ | |
615 fputs ("\t.weak\t", (FILE)); \ | |
616 assemble_name ((FILE), (NAME)); \ | |
617 fputc ('\n', (FILE)); \ | |
618 } \ | |
619 while (0) | |
620 | |
621 #define SUPPORTS_WEAK 1 | |
622 | |
623 #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \ | |
624 sprintf (STRING, "*.%s%lu", PREFIX, (unsigned long)(NUM)) | |
625 | |
626 #define HAS_INIT_SECTION 1 | |
627 | |
628 #define REGISTER_NAMES { \ | |
629 "r0","r1","r2","r3","r4","r5","r6","r7", \ | |
630 "r8","r9","r10","r11","r12","r13","r14","r15", \ | |
631 "r16","r17","r18","r19","r20","r21","r22","r23", \ | |
632 "r24","r25","r26","r27","r28","r29","r30","r31", \ | |
633 "__SP_L__","__SP_H__","argL","argH"} | |
634 | |
635 #define FINAL_PRESCAN_INSN(insn, operand, nop) final_prescan_insn (insn, operand,nop) | |
636 | |
637 #define PRINT_OPERAND(STREAM, X, CODE) print_operand (STREAM, X, CODE) | |
638 | |
639 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '~' || (CODE) == '!') | |
640 | |
641 #define PRINT_OPERAND_ADDRESS(STREAM, X) print_operand_address(STREAM, X) | |
642 | |
643 #define USER_LABEL_PREFIX "" | |
644 | |
645 #define ASSEMBLER_DIALECT AVR_HAVE_MOVW | |
646 | |
647 #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO) \ | |
648 { \ | |
649 gcc_assert (REGNO < 32); \ | |
650 fprintf (STREAM, "\tpush\tr%d", REGNO); \ | |
651 } | |
652 | |
653 #define ASM_OUTPUT_REG_POP(STREAM, REGNO) \ | |
654 { \ | |
655 gcc_assert (REGNO < 32); \ | |
656 fprintf (STREAM, "\tpop\tr%d", REGNO); \ | |
657 } | |
658 | |
659 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \ | |
660 avr_output_addr_vec_elt(STREAM, VALUE) | |
661 | |
662 #define ASM_OUTPUT_CASE_LABEL(STREAM, PREFIX, NUM, TABLE) \ | |
663 (switch_to_section (progmem_section), \ | |
664 (*targetm.asm_out.internal_label) (STREAM, PREFIX, NUM)) | |
665 | |
666 #define ASM_OUTPUT_SKIP(STREAM, N) \ | |
667 fprintf (STREAM, "\t.skip %lu,0\n", (unsigned long)(N)) | |
668 | |
669 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \ | |
670 do { \ | |
671 if ((POWER) > 1) \ | |
672 fprintf (STREAM, "\t.p2align\t%d\n", POWER); \ | |
673 } while (0) | |
674 | |
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675 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \ |
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676 default_elf_asm_output_external (FILE, DECL, NAME) |
0 | 677 |
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678 #define CASE_VECTOR_MODE HImode |
0 | 679 |
680 #undef WORD_REGISTER_OPERATIONS | |
681 | |
682 #define MOVE_MAX 4 | |
683 | |
684 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
685 | |
686 #define Pmode HImode | |
687 | |
688 #define FUNCTION_MODE HImode | |
689 | |
690 #define DOLLARS_IN_IDENTIFIERS 0 | |
691 | |
692 #define NO_DOLLAR_IN_LABEL 1 | |
693 | |
694 #define TRAMPOLINE_SIZE 4 | |
695 | |
696 /* Store in cc_status the expressions | |
697 that the condition codes will describe | |
698 after execution of an instruction whose pattern is EXP. | |
699 Do not alter them if the instruction would not alter the cc's. */ | |
700 | |
701 #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN) | |
702 | |
703 /* The add insns don't set overflow in a usable way. */ | |
704 #define CC_OVERFLOW_UNUSABLE 01000 | |
705 /* The mov,and,or,xor insns don't set carry. That's ok though as the | |
706 Z bit is all we need when doing unsigned comparisons on the result of | |
707 these insns (since they're always with 0). However, conditions.h has | |
708 CC_NO_OVERFLOW defined for this purpose. Rename it to something more | |
709 understandable. */ | |
710 #define CC_NO_CARRY CC_NO_OVERFLOW | |
711 | |
712 | |
713 /* Output assembler code to FILE to increment profiler label # LABELNO | |
714 for profiling a function entry. */ | |
715 | |
716 #define FUNCTION_PROFILER(FILE, LABELNO) \ | |
717 fprintf (FILE, "/* profiler %d */", (LABELNO)) | |
718 | |
719 #define ADJUST_INSN_LENGTH(INSN, LENGTH) (LENGTH =\ | |
720 adjust_insn_length (INSN, LENGTH)) | |
721 | |
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722 extern const char *avr_device_to_arch (int argc, const char **argv); |
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723 extern const char *avr_device_to_data_start (int argc, const char **argv); |
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724 extern const char *avr_device_to_startfiles (int argc, const char **argv); |
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725 extern const char *avr_device_to_devicelib (int argc, const char **argv); |
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726 |
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727 #define EXTRA_SPEC_FUNCTIONS \ |
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728 { "device_to_arch", avr_device_to_arch }, \ |
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729 { "device_to_data_start", avr_device_to_data_start }, \ |
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730 { "device_to_startfile", avr_device_to_startfiles }, \ |
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731 { "device_to_devicelib", avr_device_to_devicelib }, |
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732 |
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733 #define CPP_SPEC "" |
0 | 734 |
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735 #define CC1_SPEC "" |
0 | 736 |
737 #define CC1PLUS_SPEC "%{!frtti:-fno-rtti} \ | |
738 %{!fenforce-eh-specs:-fno-enforce-eh-specs} \ | |
739 %{!fexceptions:-fno-exceptions}" | |
740 /* A C string constant that tells the GCC driver program options to | |
741 pass to `cc1plus'. */ | |
742 | |
743 #define ASM_SPEC "%{mmcu=avr25:-mmcu=avr2;mmcu=avr35:-mmcu=avr3;mmcu=avr31:-mmcu=avr3;mmcu=avr51:-mmcu=avr5;\ | |
744 mmcu=*:-mmcu=%*}" | |
745 | |
746 #define LINK_SPEC "\ | |
747 %{mrelax:--relax\ | |
748 %{mpmem-wrap-around:%{mmcu=at90usb8*:--pmem-wrap-around=8k}\ | |
749 %{mmcu=atmega16*:--pmem-wrap-around=16k}\ | |
750 %{mmcu=atmega32*|\ | |
751 mmcu=at90can32*:--pmem-wrap-around=32k}\ | |
752 %{mmcu=atmega64*|\ | |
753 mmcu=at90can64*|\ | |
754 mmcu=at90usb64*:--pmem-wrap-around=64k}}}\ | |
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755 %:device_to_arch(%{mmcu=*:%*})\ |
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756 %:device_to_data_start(%{mmcu=*:%*})" |
0 | 757 |
758 #define LIB_SPEC \ | |
759 "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lc }}}}}" | |
760 | |
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761 #define LIBSTDCXX "gcc" |
0 | 762 /* No libstdc++ for now. Empty string doesn't work. */ |
763 | |
764 #define LIBGCC_SPEC \ | |
765 "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lgcc }}}}}" | |
766 | |
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767 #define STARTFILE_SPEC "%:device_to_startfile(%{mmcu=*:%*})" |
0 | 768 |
769 #define ENDFILE_SPEC "" | |
770 | |
771 /* This is the default without any -mmcu=* option (AT90S*). */ | |
772 #define MULTILIB_DEFAULTS { "mmcu=avr2" } | |
773 | |
774 #define TEST_HARD_REG_CLASS(CLASS, REGNO) \ | |
775 TEST_HARD_REG_BIT (reg_class_contents[ (int) (CLASS)], REGNO) | |
776 | |
777 /* Note that the other files fail to use these | |
778 in some of the places where they should. */ | |
779 | |
780 #if defined(__STDC__) || defined(ALMOST_STDC) | |
781 #define AS2(a,b,c) #a " " #b "," #c | |
782 #define AS2C(b,c) " " #b "," #c | |
783 #define AS3(a,b,c,d) #a " " #b "," #c "," #d | |
784 #define AS1(a,b) #a " " #b | |
785 #else | |
786 #define AS1(a,b) "a b" | |
787 #define AS2(a,b,c) "a b,c" | |
788 #define AS2C(b,c) " b,c" | |
789 #define AS3(a,b,c,d) "a b,c,d" | |
790 #endif | |
791 #define OUT_AS1(a,b) output_asm_insn (AS1(a,b), operands) | |
792 #define OUT_AS2(a,b,c) output_asm_insn (AS2(a,b,c), operands) | |
793 #define CR_TAB "\n\t" | |
794 | |
795 #define PREFERRED_DEBUGGING_TYPE DBX_DEBUG | |
796 | |
797 #define DWARF2_DEBUGGING_INFO 1 | |
798 | |
799 #define DWARF2_ADDR_SIZE 4 | |
800 | |
801 #define OBJECT_FORMAT_ELF | |
802 | |
803 #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \ | |
804 avr_hard_regno_rename_ok (OLD_REG, NEW_REG) | |
805 | |
806 /* A C structure for machine-specific, per-function data. | |
807 This is added to the cfun structure. */ | |
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808 struct GTY(()) machine_function |
0 | 809 { |
810 /* 'true' - if current function is a naked function. */ | |
811 int is_naked; | |
812 | |
813 /* 'true' - if current function is an interrupt function | |
814 as specified by the "interrupt" attribute. */ | |
815 int is_interrupt; | |
816 | |
817 /* 'true' - if current function is a signal function | |
818 as specified by the "signal" attribute. */ | |
819 int is_signal; | |
820 | |
821 /* 'true' - if current function is a 'task' function | |
822 as specified by the "OS_task" attribute. */ | |
823 int is_OS_task; | |
824 | |
825 /* 'true' - if current function is a 'main' function | |
826 as specified by the "OS_main" attribute. */ | |
827 int is_OS_main; | |
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828 |
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829 /* Current function stack size. */ |
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830 int stack_usage; |
0 | 831 }; |