Mercurial > hg > CbC > CbC_gcc
annotate gcc/config/mn10300/mn10300.h @ 67:f6334be47118
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| author | nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp> |
|---|---|
| date | Tue, 22 Mar 2011 17:18:12 +0900 |
| parents | b7f97abdc517 |
| children | 04ced10e8804 |
| rev | line source |
|---|---|
| 0 | 1 /* Definitions of target machine for GNU compiler. |
| 2 Matsushita MN10300 series | |
| 3 Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, | |
|
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4 2007, 2008, 2009, 2010 Free Software Foundation, Inc. |
| 0 | 5 Contributed by Jeff Law (law@cygnus.com). |
| 6 | |
|
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7 This file is part of GCC. |
| 0 | 8 |
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9 GCC is free software; you can redistribute it and/or modify |
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10 it under the terms of the GNU General Public License as published by |
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11 the Free Software Foundation; either version 3, or (at your option) |
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12 any later version. |
| 0 | 13 |
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14 GCC is distributed in the hope that it will be useful, |
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15 but WITHOUT ANY WARRANTY; without even the implied warranty of |
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16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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17 GNU General Public License for more details. |
| 0 | 18 |
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19 You should have received a copy of the GNU General Public License |
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20 along with GCC; see the file COPYING3. If not see |
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21 <http://www.gnu.org/licenses/>. */ |
| 0 | 22 |
| 23 #undef ASM_SPEC | |
| 24 #undef LIB_SPEC | |
| 25 #undef ENDFILE_SPEC | |
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26 #undef LINK_SPEC |
| 0 | 27 #define LINK_SPEC "%{mrelax:--relax}" |
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28 #undef STARTFILE_SPEC |
| 0 | 29 #define STARTFILE_SPEC "%{!mno-crt0:%{!shared:%{pg:gcrt0%O%s}%{!pg:%{p:mcrt0%O%s}%{!p:crt0%O%s}}}}" |
| 30 | |
| 31 /* Names to predefine in the preprocessor for this target machine. */ | |
| 32 | |
| 33 #define TARGET_CPU_CPP_BUILTINS() \ | |
| 34 do \ | |
| 35 { \ | |
| 36 builtin_define ("__mn10300__"); \ | |
| 37 builtin_define ("__MN10300__"); \ | |
| 38 builtin_assert ("cpu=mn10300"); \ | |
| 39 builtin_assert ("machine=mn10300"); \ | |
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40 \ |
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41 if (TARGET_AM34) \ |
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42 { \ |
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43 builtin_define ("__AM33__=4"); \ |
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44 builtin_define ("__AM34__"); \ |
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45 } \ |
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46 else if (TARGET_AM33_2) \ |
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47 { \ |
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48 builtin_define ("__AM33__=2"); \ |
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49 builtin_define ("__AM33_2__"); \ |
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50 } \ |
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51 else if (TARGET_AM33) \ |
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52 builtin_define ("__AM33__=1"); \ |
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53 \ |
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54 builtin_define (TARGET_ALLOW_LIW ? \ |
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55 "__LIW__" : "__NO_LIW__");\ |
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56 \ |
| 0 | 57 } \ |
| 58 while (0) | |
| 59 | |
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60 enum processor_type |
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61 { |
| 0 | 62 PROCESSOR_MN10300, |
| 63 PROCESSOR_AM33, | |
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64 PROCESSOR_AM33_2, |
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65 PROCESSOR_AM34 |
| 0 | 66 }; |
| 67 | |
| 68 extern enum processor_type mn10300_processor; | |
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69 extern enum processor_type mn10300_tune_cpu; |
| 0 | 70 |
| 71 #define TARGET_AM33 (mn10300_processor >= PROCESSOR_AM33) | |
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72 #define TARGET_AM33_2 (mn10300_processor >= PROCESSOR_AM33_2) |
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73 #define TARGET_AM34 (mn10300_processor >= PROCESSOR_AM34) |
| 0 | 74 |
| 75 #ifndef PROCESSOR_DEFAULT | |
| 76 #define PROCESSOR_DEFAULT PROCESSOR_MN10300 | |
| 77 #endif | |
| 78 | |
| 79 /* Print subsidiary information on the compiler version in use. */ | |
| 80 | |
| 81 #define TARGET_VERSION fprintf (stderr, " (MN10300)"); | |
| 82 | |
| 83 | |
| 84 /* Target machine storage layout */ | |
| 85 | |
| 86 /* Define this if most significant bit is lowest numbered | |
| 87 in instructions that operate on numbered bit-fields. | |
| 88 This is not true on the Matsushita MN1003. */ | |
| 89 #define BITS_BIG_ENDIAN 0 | |
| 90 | |
| 91 /* Define this if most significant byte of a word is the lowest numbered. */ | |
| 92 /* This is not true on the Matsushita MN10300. */ | |
| 93 #define BYTES_BIG_ENDIAN 0 | |
| 94 | |
| 95 /* Define this if most significant word of a multiword number is lowest | |
| 96 numbered. | |
| 97 This is not true on the Matsushita MN10300. */ | |
| 98 #define WORDS_BIG_ENDIAN 0 | |
| 99 | |
| 100 /* Width of a word, in units (bytes). */ | |
| 101 #define UNITS_PER_WORD 4 | |
| 102 | |
| 103 /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
| 104 #define PARM_BOUNDARY 32 | |
| 105 | |
| 106 /* The stack goes in 32-bit lumps. */ | |
| 107 #define STACK_BOUNDARY 32 | |
| 108 | |
| 109 /* Allocation boundary (in *bits*) for the code of a function. | |
| 110 8 is the minimum boundary; it's unclear if bigger alignments | |
| 111 would improve performance. */ | |
| 112 #define FUNCTION_BOUNDARY 8 | |
| 113 | |
| 114 /* No data type wants to be aligned rounder than this. */ | |
| 115 #define BIGGEST_ALIGNMENT 32 | |
| 116 | |
| 117 /* Alignment of field after `int : 0' in a structure. */ | |
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118 #define EMPTY_FIELD_BOUNDARY 32 |
| 0 | 119 |
| 120 /* Define this if move instructions will actually fail to work | |
| 121 when given unaligned data. */ | |
| 122 #define STRICT_ALIGNMENT 1 | |
| 123 | |
| 124 /* Define this as 1 if `char' should by default be signed; else as 0. */ | |
| 125 #define DEFAULT_SIGNED_CHAR 0 | |
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126 |
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127 #undef SIZE_TYPE |
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128 #define SIZE_TYPE "unsigned int" |
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129 |
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130 #undef PTRDIFF_TYPE |
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131 #define PTRDIFF_TYPE "int" |
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132 |
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133 #undef WCHAR_TYPE |
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134 #define WCHAR_TYPE "long int" |
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135 |
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136 #undef WCHAR_TYPE_SIZE |
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137 #define WCHAR_TYPE_SIZE BITS_PER_WORD |
| 0 | 138 |
| 139 /* Standard register usage. */ | |
| 140 | |
| 141 /* Number of actual hardware registers. | |
| 142 The hardware registers are assigned numbers for the compiler | |
| 143 from 0 to just below FIRST_PSEUDO_REGISTER. | |
| 144 | |
| 145 All registers that the compiler knows about must be given numbers, | |
| 146 even those that are not normally considered general registers. */ | |
| 147 | |
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148 #define FIRST_PSEUDO_REGISTER 52 |
| 0 | 149 |
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150 /* Specify machine-specific register numbers. The commented out entries |
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151 are defined in mn10300.md. */ |
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152 #define FIRST_DATA_REGNUM 0 |
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153 #define LAST_DATA_REGNUM 3 |
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154 #define FIRST_ADDRESS_REGNUM 4 |
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155 /* #define PIC_REG 6 */ |
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156 #define LAST_ADDRESS_REGNUM 8 |
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157 /* #define SP_REG 9 */ |
| 0 | 158 #define FIRST_EXTENDED_REGNUM 10 |
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159 #define LAST_EXTENDED_REGNUM 17 |
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160 #define FIRST_FP_REGNUM 18 |
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161 #define LAST_FP_REGNUM 49 |
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162 /* #define MDR_REG 50 */ |
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163 /* #define CC_REG 51 */ |
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164 #define FIRST_ARGUMENT_REGNUM 0 |
| 0 | 165 |
| 166 /* Specify the registers used for certain standard purposes. | |
| 167 The values of these macros are register numbers. */ | |
| 168 | |
| 169 /* Register to use for pushing function arguments. */ | |
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170 #define STACK_POINTER_REGNUM (LAST_ADDRESS_REGNUM + 1) |
| 0 | 171 |
| 172 /* Base register for access to local variables of the function. */ | |
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173 #define FRAME_POINTER_REGNUM (LAST_ADDRESS_REGNUM - 1) |
| 0 | 174 |
| 175 /* Base register for access to arguments of the function. This | |
| 176 is a fake register and will be eliminated into either the frame | |
| 177 pointer or stack pointer. */ | |
| 178 #define ARG_POINTER_REGNUM LAST_ADDRESS_REGNUM | |
| 179 | |
| 180 /* Register in which static-chain is passed to a function. */ | |
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181 #define STATIC_CHAIN_REGNUM (FIRST_ADDRESS_REGNUM + 1) |
| 0 | 182 |
| 183 /* 1 for registers that have pervasive standard uses | |
| 184 and are not available for the register allocator. */ | |
| 185 | |
| 186 #define FIXED_REGISTERS \ | |
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187 { 0, 0, 0, 0, /* data regs */ \ |
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188 0, 0, 0, 0, /* addr regs */ \ |
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189 1, /* arg reg */ \ |
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190 1, /* sp reg */ \ |
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191 0, 0, 0, 0, 0, 0, 0, 0, /* extended regs */ \ |
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192 0, 0, /* fp regs (18-19) */ \ |
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193 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* fp regs (20-29) */ \ |
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194 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* fp regs (30-39) */ \ |
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195 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* fp regs (40-49) */ \ |
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196 0, /* mdr reg */ \ |
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197 1 /* cc reg */ \ |
| 0 | 198 } |
| 199 | |
| 200 /* 1 for registers not available across function calls. | |
| 201 These must include the FIXED_REGISTERS and also any | |
| 202 registers that can be used without being saved. | |
| 203 The latter must include the registers where values are returned | |
| 204 and the register where structure-value addresses are passed. | |
| 205 Aside from that, you can include as many other registers as you | |
| 206 like. */ | |
| 207 | |
| 208 #define CALL_USED_REGISTERS \ | |
|
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209 { 1, 1, 0, 0, /* data regs */ \ |
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210 1, 1, 0, 0, /* addr regs */ \ |
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211 1, /* arg reg */ \ |
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212 1, /* sp reg */ \ |
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213 1, 1, 1, 1, 0, 0, 0, 0, /* extended regs */ \ |
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214 1, 1, /* fp regs (18-19) */ \ |
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215 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, /* fp regs (20-29) */ \ |
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216 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, /* fp regs (30-39) */ \ |
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217 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* fp regs (40-49) */ \ |
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218 1, /* mdr reg */ \ |
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219 1 /* cc reg */ \ |
| 0 | 220 } |
| 221 | |
| 222 /* Note: The definition of CALL_REALLY_USED_REGISTERS is not | |
| 223 redundant. It is needed when compiling in PIC mode because | |
| 224 the a2 register becomes fixed (and hence must be marked as | |
| 225 call_used) but in order to preserve the ABI it is not marked | |
| 226 as call_really_used. */ | |
| 227 #define CALL_REALLY_USED_REGISTERS CALL_USED_REGISTERS | |
| 228 | |
| 229 #define REG_ALLOC_ORDER \ | |
| 230 { 0, 1, 4, 5, 2, 3, 6, 7, 10, 11, 12, 13, 14, 15, 16, 17, 8, 9 \ | |
| 231 , 42, 43, 44, 45, 46, 47, 48, 49, 34, 35, 36, 37, 38, 39, 40, 41 \ | |
|
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232 , 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 50, 51 \ |
| 0 | 233 } |
| 234 | |
| 235 /* Return number of consecutive hard regs needed starting at reg REGNO | |
| 236 to hold something of mode MODE. | |
| 237 | |
| 238 This is ordinarily the length in words of a value of mode MODE | |
| 239 but can be less for certain modes in special long registers. */ | |
| 240 | |
| 241 #define HARD_REGNO_NREGS(REGNO, MODE) \ | |
| 242 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
| 243 | |
| 244 /* Value is 1 if hard register REGNO can hold a value of machine-mode | |
| 245 MODE. */ | |
| 246 #define HARD_REGNO_MODE_OK(REGNO, MODE) \ | |
|
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247 mn10300_hard_regno_mode_ok ((REGNO), (MODE)) |
| 0 | 248 |
| 249 /* Value is 1 if it is a good idea to tie two pseudo registers | |
| 250 when one has mode MODE1 and one has mode MODE2. | |
| 251 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, | |
| 252 for any hard reg, then this must be 0 for correct output. */ | |
| 253 #define MODES_TIEABLE_P(MODE1, MODE2) \ | |
|
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254 mn10300_modes_tieable ((MODE1), (MODE2)) |
| 0 | 255 |
| 256 /* 4 data, and effectively 3 address registers is small as far as I'm | |
| 257 concerned. */ | |
|
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258 #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true |
| 0 | 259 |
| 260 /* Define the classes of registers for register constraints in the | |
| 261 machine description. Also define ranges of constants. | |
| 262 | |
| 263 One of the classes must always be named ALL_REGS and include all hard regs. | |
| 264 If there is more than one class, another class must be named NO_REGS | |
| 265 and contain no registers. | |
| 266 | |
| 267 The name GENERAL_REGS must be the name of a class (or an alias for | |
| 268 another name such as ALL_REGS). This is the class of registers | |
| 269 that is allowed by "g" or "r" in a register constraint. | |
| 270 Also, registers outside this class are allocated only when | |
| 271 instructions express preferences for them. | |
| 272 | |
| 273 The classes must be numbered in nondecreasing order; that is, | |
| 274 a larger-numbered class must never be contained completely | |
| 275 in a smaller-numbered class. | |
| 276 | |
| 277 For any two classes, it is very desirable that there be another | |
| 278 class that represents their union. */ | |
| 279 | |
|
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280 enum reg_class |
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281 { |
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282 NO_REGS, DATA_REGS, ADDRESS_REGS, SP_REGS, SP_OR_ADDRESS_REGS, |
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283 EXTENDED_REGS, FP_REGS, FP_ACC_REGS, CC_REGS, MDR_REGS, |
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284 GENERAL_REGS, SP_OR_GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES |
| 0 | 285 }; |
| 286 | |
| 287 #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
| 288 | |
| 289 /* Give names of register classes as strings for dump file. */ | |
| 290 | |
|
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291 #define REG_CLASS_NAMES \ |
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292 { "NO_REGS", "DATA_REGS", "ADDRESS_REGS", "SP_REGS", "SP_OR_ADDRESS_REGS", \ |
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293 "EXTENDED_REGS", "FP_REGS", "FP_ACC_REGS", "CC_REGS", "MDR_REGS", \ |
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294 "GENERAL_REGS", "SP_OR_GENERAL_REGS", "ALL_REGS", "LIM_REGS" \ |
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295 } |
| 0 | 296 |
| 297 /* Define which registers fit in which classes. | |
| 298 This is an initializer for a vector of HARD_REG_SET | |
| 299 of length N_REG_CLASSES. */ | |
| 300 | |
|
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301 #define REG_CLASS_CONTENTS \ |
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302 { { 0, 0 }, /* No regs */ \ |
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303 { 0x0000000f, 0 }, /* DATA_REGS */ \ |
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304 { 0x000001f0, 0 }, /* ADDRESS_REGS */ \ |
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305 { 0x00000200, 0 }, /* SP_REGS */ \ |
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306 { 0x000003f0, 0 }, /* SP_OR_ADDRESS_REGS */ \ |
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307 { 0x0003fc00, 0 }, /* EXTENDED_REGS */ \ |
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308 { 0xfffc0000, 0x3ffff },/* FP_REGS */ \ |
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309 { 0x03fc0000, 0 }, /* FP_ACC_REGS */ \ |
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310 { 0x00000000, 0x80000 },/* CC_REGS */ \ |
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311 { 0x00000000, 0x40000 },/* MDR_REGS */ \ |
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312 { 0x0003fdff, 0 }, /* GENERAL_REGS */ \ |
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313 { 0x0003ffff, 0 }, /* SP_OR_GENERAL_REGS */ \ |
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314 { 0xffffffff, 0xfffff } /* ALL_REGS */ \ |
| 0 | 315 } |
| 316 | |
| 317 /* The following macro defines cover classes for Integrated Register | |
| 318 Allocator. Cover classes is a set of non-intersected register | |
| 319 classes covering all hard registers used for register allocation | |
| 320 purpose. Any move between two registers of a cover class should be | |
| 321 cheaper than load or store of the registers. The macro value is | |
| 322 array of register classes with LIM_REG_CLASSES used as the end | |
| 323 marker. */ | |
| 324 | |
|
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325 #define IRA_COVER_CLASSES \ |
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326 { \ |
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327 GENERAL_REGS, FP_REGS, MDR_REGS, LIM_REG_CLASSES \ |
| 0 | 328 } |
| 329 | |
| 330 /* The same information, inverted: | |
| 331 Return the class number of the smallest class containing | |
| 332 reg number REGNO. This could be a conditional expression | |
| 333 or could index an array. */ | |
| 334 | |
|
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335 #define REGNO_REG_CLASS(REGNO) \ |
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336 ((REGNO) <= LAST_DATA_REGNUM ? DATA_REGS : \ |
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337 (REGNO) <= LAST_ADDRESS_REGNUM ? ADDRESS_REGS : \ |
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338 (REGNO) == STACK_POINTER_REGNUM ? SP_REGS : \ |
| 0 | 339 (REGNO) <= LAST_EXTENDED_REGNUM ? EXTENDED_REGS : \ |
|
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340 (REGNO) <= LAST_FP_REGNUM ? FP_REGS : \ |
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341 (REGNO) == MDR_REG ? MDR_REGS : \ |
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342 (REGNO) == CC_REG ? CC_REGS : \ |
| 0 | 343 NO_REGS) |
| 344 | |
| 345 /* The class value for index registers, and the one for base regs. */ | |
|
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346 #define INDEX_REG_CLASS \ |
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347 (TARGET_AM33 ? GENERAL_REGS : DATA_REGS) |
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348 #define BASE_REG_CLASS \ |
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349 (TARGET_AM33 ? SP_OR_GENERAL_REGS : SP_OR_ADDRESS_REGS) |
| 0 | 350 |
| 351 /* Macros to check register numbers against specific register classes. */ | |
| 352 | |
| 353 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx | |
| 354 and check its validity for a certain class. | |
| 355 We have two alternate definitions for each of them. | |
| 356 The usual definition accepts all pseudo regs; the other rejects | |
| 357 them unless they have been allocated suitable hard regs. | |
| 358 The symbol REG_OK_STRICT causes the latter definition to be used. | |
| 359 | |
| 360 Most source files want to accept pseudo regs in the hope that | |
| 361 they will get allocated to the class that the insn wants them to be in. | |
| 362 Source files for reload pass need to be strict. | |
| 363 After reload, it makes no difference, since pseudo regs have | |
| 364 been eliminated by then. */ | |
| 365 | |
| 366 /* These assume that REGNO is a hard or pseudo reg number. | |
| 367 They give nonzero only if REGNO is a hard reg of the suitable class | |
| 368 or a pseudo reg currently allocated to a suitable hard reg. | |
| 369 Since they use reg_renumber, they are safe only once reg_renumber | |
| 370 has been allocated, which happens in local-alloc.c. */ | |
| 371 | |
| 372 #ifndef REG_OK_STRICT | |
| 373 # define REG_STRICT 0 | |
| 374 #else | |
| 375 # define REG_STRICT 1 | |
| 376 #endif | |
| 377 | |
| 378 #define REGNO_DATA_P(regno, strict) \ | |
|
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379 mn10300_regno_in_class_p (regno, DATA_REGS, strict) |
| 0 | 380 #define REGNO_ADDRESS_P(regno, strict) \ |
|
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381 mn10300_regno_in_class_p (regno, ADDRESS_REGS, strict) |
| 0 | 382 #define REGNO_EXTENDED_P(regno, strict) \ |
|
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383 mn10300_regno_in_class_p (regno, EXTENDED_REGS, strict) |
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384 #define REGNO_GENERAL_P(regno, strict) \ |
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385 mn10300_regno_in_class_p (regno, GENERAL_REGS, strict) |
| 0 | 386 |
| 387 #define REGNO_STRICT_OK_FOR_BASE_P(regno, strict) \ | |
|
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388 mn10300_regno_in_class_p (regno, BASE_REG_CLASS, strict) |
| 0 | 389 #define REGNO_OK_FOR_BASE_P(regno) \ |
| 390 (REGNO_STRICT_OK_FOR_BASE_P ((regno), REG_STRICT)) | |
| 391 #define REG_OK_FOR_BASE_P(X) \ | |
| 392 (REGNO_OK_FOR_BASE_P (REGNO (X))) | |
| 393 | |
| 394 #define REGNO_STRICT_OK_FOR_BIT_BASE_P(regno, strict) \ | |
|
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395 mn10300_regno_in_class_p (regno, ADDRESS_REGS, strict) |
| 0 | 396 #define REGNO_OK_FOR_BIT_BASE_P(regno) \ |
| 397 (REGNO_STRICT_OK_FOR_BIT_BASE_P ((regno), REG_STRICT)) | |
| 398 #define REG_OK_FOR_BIT_BASE_P(X) \ | |
| 399 (REGNO_OK_FOR_BIT_BASE_P (REGNO (X))) | |
| 400 | |
| 401 #define REGNO_STRICT_OK_FOR_INDEX_P(regno, strict) \ | |
|
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402 mn10300_regno_in_class_p (regno, INDEX_REG_CLASS, strict) |
| 0 | 403 #define REGNO_OK_FOR_INDEX_P(regno) \ |
| 404 (REGNO_STRICT_OK_FOR_INDEX_P ((regno), REG_STRICT)) | |
| 405 #define REG_OK_FOR_INDEX_P(X) \ | |
| 406 (REGNO_OK_FOR_INDEX_P (REGNO (X))) | |
| 407 | |
| 408 #define LIMIT_RELOAD_CLASS(MODE, CLASS) \ | |
| 409 (!TARGET_AM33 && (MODE == QImode || MODE == HImode) ? DATA_REGS : CLASS) | |
| 410 | |
| 411 /* Return the maximum number of consecutive registers | |
| 412 needed to represent mode MODE in a register of class CLASS. */ | |
| 413 | |
| 414 #define CLASS_MAX_NREGS(CLASS, MODE) \ | |
| 415 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
| 416 | |
| 417 /* A class that contains registers which the compiler must always | |
| 418 access in a mode that is the same size as the mode in which it | |
| 419 loaded the register. */ | |
| 420 #define CLASS_CANNOT_CHANGE_SIZE FP_REGS | |
| 421 | |
| 422 /* Return 1 if VALUE is in the range specified. */ | |
| 423 | |
| 424 #define INT_8_BITS(VALUE) ((unsigned) (VALUE) + 0x80 < 0x100) | |
| 425 #define INT_16_BITS(VALUE) ((unsigned) (VALUE) + 0x8000 < 0x10000) | |
| 426 | |
| 427 | |
| 428 /* Stack layout; function entry, exit and calling. */ | |
| 429 | |
| 430 /* Define this if pushing a word on the stack | |
| 431 makes the stack pointer a smaller address. */ | |
| 432 | |
| 433 #define STACK_GROWS_DOWNWARD | |
| 434 | |
| 435 /* Define this to nonzero if the nominal address of the stack frame | |
| 436 is at the high-address end of the local variables; | |
| 437 that is, each additional local variable allocated | |
| 438 goes at a more negative offset in the frame. */ | |
| 439 | |
| 440 #define FRAME_GROWS_DOWNWARD 1 | |
| 441 | |
| 442 /* Offset within stack frame to start allocating local variables at. | |
| 443 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the | |
| 444 first local allocated. Otherwise, it is the offset to the BEGINNING | |
| 445 of the first local allocated. */ | |
| 446 | |
| 447 #define STARTING_FRAME_OFFSET 0 | |
| 448 | |
| 449 /* Offset of first parameter from the argument pointer register value. */ | |
| 450 /* Is equal to the size of the saved fp + pc, even if an fp isn't | |
| 451 saved since the value is used before we know. */ | |
| 452 | |
| 453 #define FIRST_PARM_OFFSET(FNDECL) 4 | |
| 454 | |
|
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455 /* But the CFA is at the arg pointer directly, not at the first argument. */ |
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456 #define ARG_POINTER_CFA_OFFSET(FNDECL) 0 |
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457 |
| 0 | 458 #define ELIMINABLE_REGS \ |
| 459 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
| 460 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ | |
| 461 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}} | |
| 462 | |
| 463 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ | |
|
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464 OFFSET = mn10300_initial_offset (FROM, TO) |
| 0 | 465 |
| 466 /* We use d0/d1 for passing parameters, so allocate 8 bytes of space | |
| 467 for a register flushback area. */ | |
| 468 #define REG_PARM_STACK_SPACE(DECL) 8 | |
| 469 #define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1 | |
| 470 #define ACCUMULATE_OUTGOING_ARGS 1 | |
| 471 | |
| 472 /* So we can allocate space for return pointers once for the function | |
| 473 instead of around every call. */ | |
| 474 #define STACK_POINTER_OFFSET 4 | |
| 475 | |
| 476 /* 1 if N is a possible register number for function argument passing. | |
|
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477 On the MN10300, d0 and d1 are used in this way. */ |
| 0 | 478 |
| 479 #define FUNCTION_ARG_REGNO_P(N) ((N) <= 1) | |
| 480 | |
| 481 | |
| 482 /* Define a data type for recording info about an argument list | |
| 483 during the scan of that argument list. This data type should | |
| 484 hold all necessary information about the function itself | |
| 485 and about the args processed so far, enough to enable macros | |
| 486 such as FUNCTION_ARG to determine where the next arg should go. | |
| 487 | |
| 488 On the MN10300, this is a single integer, which is a number of bytes | |
| 489 of arguments scanned so far. */ | |
| 490 | |
| 491 #define CUMULATIVE_ARGS struct cum_arg | |
|
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492 |
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493 struct cum_arg |
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494 { |
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495 int nbytes; |
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496 }; |
| 0 | 497 |
| 498 /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
| 499 for a call to a function whose data type is FNTYPE. | |
| 500 For a library call, FNTYPE is 0. | |
| 501 | |
| 502 On the MN10300, the offset starts at 0. */ | |
| 503 | |
| 504 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \ | |
| 505 ((CUM).nbytes = 0) | |
| 506 | |
|
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507 #define FUNCTION_VALUE_REGNO_P(N) mn10300_function_value_regno_p (N) |
| 0 | 508 |
| 509 #define DEFAULT_PCC_STRUCT_RETURN 0 | |
| 510 | |
| 511 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, | |
| 512 the stack pointer does not matter. The value is tested only in | |
| 513 functions that have frame pointers. | |
| 514 No definition is equivalent to always zero. */ | |
| 515 | |
| 516 #define EXIT_IGNORE_STACK 1 | |
| 517 | |
| 518 /* Output assembler code to FILE to increment profiler label # LABELNO | |
| 519 for profiling a function entry. */ | |
| 520 | |
| 521 #define FUNCTION_PROFILER(FILE, LABELNO) ; | |
| 522 | |
| 523 /* Length in units of the trampoline for entering a nested function. */ | |
| 524 | |
|
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525 #define TRAMPOLINE_SIZE 16 |
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526 #define TRAMPOLINE_ALIGNMENT 32 |
| 0 | 527 |
| 528 /* A C expression whose value is RTL representing the value of the return | |
| 529 address for the frame COUNT steps up from the current frame. | |
| 530 | |
| 531 On the mn10300, the return address is not at a constant location | |
| 532 due to the frame layout. Luckily, it is at a constant offset from | |
| 533 the argument pointer, so we define RETURN_ADDR_RTX to return a | |
| 534 MEM using arg_pointer_rtx. Reload will replace arg_pointer_rtx | |
| 535 with a reference to the stack/frame pointer + an appropriate offset. */ | |
| 536 | |
| 537 #define RETURN_ADDR_RTX(COUNT, FRAME) \ | |
| 538 ((COUNT == 0) \ | |
| 539 ? gen_rtx_MEM (Pmode, arg_pointer_rtx) \ | |
| 540 : (rtx) 0) | |
|
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541 |
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542 /* The return address is saved both in the stack and in MDR. Using |
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543 the stack location is handiest for what unwinding needs. */ |
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544 #define INCOMING_RETURN_ADDR_RTX \ |
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545 gen_rtx_MEM (VOIDmode, gen_rtx_REG (VOIDmode, STACK_POINTER_REGNUM)) |
| 0 | 546 |
| 547 /* Maximum number of registers that can appear in a valid memory address. */ | |
| 548 | |
| 549 #define MAX_REGS_PER_ADDRESS 2 | |
| 550 | |
| 551 | |
|
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552 /* We have post-increments. */ |
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553 #define HAVE_POST_INCREMENT TARGET_AM33 |
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554 #define HAVE_POST_MODIFY_DISP TARGET_AM33 |
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555 |
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556 /* ... But we don't want to use them for block moves. Small offsets are |
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557 just as effective, at least for inline block move sizes, and appears |
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558 to produce cleaner code. */ |
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559 #define USE_LOAD_POST_INCREMENT(M) 0 |
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560 #define USE_STORE_POST_INCREMENT(M) 0 |
| 0 | 561 |
| 562 /* Accept either REG or SUBREG where a register is valid. */ | |
| 563 | |
| 564 #define RTX_OK_FOR_BASE_P(X, strict) \ | |
| 565 ((REG_P (X) && REGNO_STRICT_OK_FOR_BASE_P (REGNO (X), \ | |
| 566 (strict))) \ | |
| 567 || (GET_CODE (X) == SUBREG && REG_P (SUBREG_REG (X)) \ | |
| 568 && REGNO_STRICT_OK_FOR_BASE_P (REGNO (SUBREG_REG (X)), \ | |
| 569 (strict)))) | |
| 570 | |
|
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571 #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_L,WIN) \ |
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572 do { \ |
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573 rtx new_x = mn10300_legitimize_reload_address (X, MODE, OPNUM, TYPE, IND_L); \ |
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574 if (new_x) \ |
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575 { \ |
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576 X = new_x; \ |
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577 goto WIN; \ |
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578 } \ |
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579 } while (0) |
| 0 | 580 |
| 581 | |
| 582 /* Nonzero if the constant value X is a legitimate general operand. | |
| 583 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ | |
|
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584 #define LEGITIMATE_CONSTANT_P(X) mn10300_legitimate_constant_p (X) |
| 0 | 585 |
| 586 /* Zero if this needs fixing up to become PIC. */ | |
| 587 | |
|
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588 #define LEGITIMATE_PIC_OPERAND_P(X) \ |
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589 mn10300_legitimate_pic_operand_p (X) |
| 0 | 590 |
| 591 /* Register to hold the addressing base for | |
| 592 position independent code access to data items. */ | |
| 593 #define PIC_OFFSET_TABLE_REGNUM PIC_REG | |
| 594 | |
| 595 /* The name of the pseudo-symbol representing the Global Offset Table. */ | |
| 596 #define GOT_SYMBOL_NAME "*_GLOBAL_OFFSET_TABLE_" | |
| 597 | |
| 598 #define SYMBOLIC_CONST_P(X) \ | |
| 599 ((GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == LABEL_REF) \ | |
| 600 && ! LEGITIMATE_PIC_OPERAND_P (X)) | |
| 601 | |
| 602 /* Non-global SYMBOL_REFs have SYMBOL_REF_FLAG enabled. */ | |
| 603 #define MN10300_GLOBAL_P(X) (! SYMBOL_REF_FLAG (X)) | |
| 604 | |
|
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605 #define SELECT_CC_MODE(OP, X, Y) mn10300_select_cc_mode (OP, X, Y) |
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606 #define REVERSIBLE_CC_MODE(MODE) 0 |
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607 |
| 0 | 608 /* Nonzero if access to memory by bytes or half words is no faster |
| 609 than accessing full words. */ | |
| 610 #define SLOW_BYTE_ACCESS 1 | |
| 611 | |
| 612 #define NO_FUNCTION_CSE | |
| 613 | |
| 614 /* According expr.c, a value of around 6 should minimize code size, and | |
| 615 for the MN10300 series, that's our primary concern. */ | |
| 616 #define MOVE_RATIO(speed) 6 | |
| 617 | |
| 618 #define TEXT_SECTION_ASM_OP "\t.section .text" | |
| 619 #define DATA_SECTION_ASM_OP "\t.section .data" | |
|
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620 #define BSS_SECTION_ASM_OP "\t.section .bss" |
| 0 | 621 |
| 622 #define ASM_COMMENT_START "#" | |
| 623 | |
| 624 /* Output to assembler file text saying following lines | |
| 625 may contain character constants, extra white space, comments, etc. */ | |
| 626 | |
| 627 #define ASM_APP_ON "#APP\n" | |
| 628 | |
| 629 /* Output to assembler file text saying following lines | |
| 630 no longer contain unusual constructs. */ | |
| 631 | |
| 632 #define ASM_APP_OFF "#NO_APP\n" | |
| 633 | |
|
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634 #undef USER_LABEL_PREFIX |
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635 #define USER_LABEL_PREFIX "_" |
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636 |
| 0 | 637 /* This says how to output the assembler to define a global |
| 638 uninitialized but not common symbol. | |
| 639 Try to use asm_output_bss to implement this macro. */ | |
| 640 | |
| 641 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \ | |
| 642 asm_output_aligned_bss ((FILE), (DECL), (NAME), (SIZE), (ALIGN)) | |
| 643 | |
| 644 /* Globalizing directive for a label. */ | |
| 645 #define GLOBAL_ASM_OP "\t.global " | |
| 646 | |
| 647 /* This is how to output a reference to a user-level label named NAME. | |
| 648 `assemble_name' uses this. */ | |
| 649 | |
|
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650 #undef ASM_OUTPUT_LABELREF |
| 0 | 651 #define ASM_OUTPUT_LABELREF(FILE, NAME) \ |
|
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652 asm_fprintf (FILE, "%U%s", (*targetm.strip_name_encoding) (NAME)) |
| 0 | 653 |
| 654 /* This is how we tell the assembler that two symbols have the same value. */ | |
| 655 | |
| 656 #define ASM_OUTPUT_DEF(FILE,NAME1,NAME2) \ | |
|
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657 do \ |
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658 { \ |
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659 assemble_name (FILE, NAME1); \ |
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660 fputs (" = ", FILE); \ |
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661 assemble_name (FILE, NAME2); \ |
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662 fputc ('\n', FILE); \ |
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663 } \ |
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664 while (0) |
| 0 | 665 |
| 666 /* How to refer to registers in assembler output. | |
| 667 This sequence is indexed by compiler's hard-register-number (see above). */ | |
| 668 | |
|
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669 #define REGISTER_NAMES \ |
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670 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", "ap", "sp", \ |
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671 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7" \ |
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672 , "fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7" \ |
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673 , "fs8", "fs9", "fs10", "fs11", "fs12", "fs13", "fs14", "fs15" \ |
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674 , "fs16", "fs17", "fs18", "fs19", "fs20", "fs21", "fs22", "fs23" \ |
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675 , "fs24", "fs25", "fs26", "fs27", "fs28", "fs29", "fs30", "fs31" \ |
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676 , "mdr", "EPSW" \ |
| 0 | 677 } |
| 678 | |
|
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679 #define ADDITIONAL_REGISTER_NAMES \ |
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680 { {"r8", 4}, {"r9", 5}, {"r10", 6}, {"r11", 7}, \ |
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681 {"r12", 0}, {"r13", 1}, {"r14", 2}, {"r15", 3}, \ |
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682 {"e0", 10}, {"e1", 11}, {"e2", 12}, {"e3", 13}, \ |
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683 {"e4", 14}, {"e5", 15}, {"e6", 16}, {"e7", 17} \ |
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684 , {"fd0", 18}, {"fd2", 20}, {"fd4", 22}, {"fd6", 24} \ |
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685 , {"fd8", 26}, {"fd10", 28}, {"fd12", 30}, {"fd14", 32} \ |
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686 , {"fd16", 34}, {"fd18", 36}, {"fd20", 38}, {"fd22", 40} \ |
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687 , {"fd24", 42}, {"fd26", 44}, {"fd28", 46}, {"fd30", 48} \ |
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688 , {"cc", CC_REG} \ |
| 0 | 689 } |
| 690 | |
| 691 /* Print an instruction operand X on file FILE. | |
| 692 look in mn10300.c for details */ | |
| 693 | |
|
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694 #define PRINT_OPERAND(FILE, X, CODE) \ |
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695 mn10300_print_operand (FILE, X, CODE) |
| 0 | 696 |
| 697 /* Print a memory operand whose address is X, on file FILE. | |
| 698 This uses a function in output-vax.c. */ | |
| 699 | |
|
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700 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ |
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701 mn10300_print_operand_address (FILE, ADDR) |
| 0 | 702 |
| 703 /* This is how to output an element of a case-vector that is absolute. */ | |
| 704 | |
| 705 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ | |
| 706 fprintf (FILE, "\t%s .L%d\n", ".long", VALUE) | |
| 707 | |
| 708 /* This is how to output an element of a case-vector that is relative. */ | |
| 709 | |
| 710 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ | |
| 711 fprintf (FILE, "\t%s .L%d-.L%d\n", ".long", VALUE, REL) | |
| 712 | |
| 713 #define ASM_OUTPUT_ALIGN(FILE,LOG) \ | |
| 714 if ((LOG) != 0) \ | |
| 715 fprintf (FILE, "\t.align %d\n", (LOG)) | |
| 716 | |
| 717 /* We don't have to worry about dbx compatibility for the mn10300. */ | |
| 718 #define DEFAULT_GDB_EXTENSIONS 1 | |
| 719 | |
| 720 /* Use dwarf2 debugging info by default. */ | |
|
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721 #undef PREFERRED_DEBUGGING_TYPE |
| 0 | 722 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG |
|
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723 #define DWARF2_DEBUGGING_INFO 1 |
| 0 | 724 #define DWARF2_ASM_LINE_DEBUG_INFO 1 |
| 725 | |
| 726 /* Specify the machine mode that this machine uses | |
| 727 for the index in the tablejump instruction. */ | |
| 728 #define CASE_VECTOR_MODE Pmode | |
| 729 | |
| 730 /* Define if operations between registers always perform the operation | |
| 731 on the full register even if a narrower mode is specified. */ | |
| 732 #define WORD_REGISTER_OPERATIONS | |
| 733 | |
| 734 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND | |
| 735 | |
| 736 /* This flag, if defined, says the same insns that convert to a signed fixnum | |
| 737 also convert validly to an unsigned one. */ | |
| 738 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC | |
| 739 | |
| 740 /* Max number of bytes we can move from memory to memory | |
| 741 in one reasonably fast instruction. */ | |
| 742 #define MOVE_MAX 4 | |
| 743 | |
| 744 /* Define if shifts truncate the shift count | |
| 745 which implies one can omit a sign-extension or zero-extension | |
| 746 of a shift count. */ | |
| 747 #define SHIFT_COUNT_TRUNCATED 1 | |
| 748 | |
| 749 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits | |
| 750 is done just by pretending it is already truncated. */ | |
| 751 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
| 752 | |
| 753 /* Specify the machine mode that pointers have. | |
| 754 After generation of rtl, the compiler makes no further distinction | |
| 755 between pointers and any other objects of this machine mode. */ | |
| 756 #define Pmode SImode | |
| 757 | |
| 758 /* A function address in a call instruction | |
| 759 is a byte address (for indexing purposes) | |
| 760 so give the MEM rtx a byte's mode. */ | |
| 761 #define FUNCTION_MODE QImode | |
| 762 | |
| 763 /* The assembler op to get a word. */ | |
| 764 | |
| 765 #define FILE_ASM_OP "\t.file\n" | |
| 766 |