Mercurial > hg > CbC > CbC_gcc
annotate gcc/config/pa/predicates.md @ 67:f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
author | nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp> |
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date | Tue, 22 Mar 2011 17:18:12 +0900 |
parents | 77e2b8dfacca |
children | 04ced10e8804 |
rev | line source |
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0 | 1 ;; Predicate definitions for HP PA-RISC. |
67
f6334be47118
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2 ;; Copyright (C) 2005, 2007, 2010 Free Software Foundation, Inc. |
0 | 3 ;; |
4 ;; This file is part of GCC. | |
5 ;; | |
6 ;; GCC is free software; you can redistribute it and/or modify | |
7 ;; it under the terms of the GNU General Public License as published by | |
8 ;; the Free Software Foundation; either version 3, or (at your option) | |
9 ;; any later version. | |
10 ;; | |
11 ;; GCC is distributed in the hope that it will be useful, | |
12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 ;; GNU General Public License for more details. | |
15 ;; | |
16 ;; You should have received a copy of the GNU General Public License | |
17 ;; along with GCC; see the file COPYING3. If not see | |
18 ;; <http://www.gnu.org/licenses/>. | |
19 | |
20 ;; Return nonzero only if OP is a register of mode MODE, or | |
21 ;; CONST0_RTX. | |
22 | |
23 (define_predicate "reg_or_0_operand" | |
24 (match_code "subreg,reg,const_int,const_double") | |
25 { | |
26 return (op == CONST0_RTX (mode) || register_operand (op, mode)); | |
27 }) | |
28 | |
29 ;; Return nonzero if OP is suitable for use in a call to a named | |
30 ;; function. | |
31 ;; | |
32 ;; For 2.5 try to eliminate either call_operand_address or | |
33 ;; function_label_operand, they perform very similar functions. | |
34 | |
35 (define_predicate "call_operand_address" | |
36 (match_code "label_ref,symbol_ref,const_int,const_double,const,high") | |
37 { | |
38 return (GET_MODE (op) == word_mode | |
39 && CONSTANT_P (op) && ! TARGET_PORTABLE_RUNTIME); | |
40 }) | |
41 | |
42 ;; Return 1 iff OP is an indexed memory operand. | |
43 | |
44 (define_predicate "indexed_memory_operand" | |
45 (match_code "subreg,mem") | |
46 { | |
47 if (GET_MODE (op) != mode) | |
48 return 0; | |
49 | |
50 /* Before reload, a (SUBREG (MEM...)) forces reloading into a register. */ | |
51 if (reload_completed && GET_CODE (op) == SUBREG) | |
52 op = SUBREG_REG (op); | |
53 | |
54 if (GET_CODE (op) != MEM || symbolic_memory_operand (op, mode)) | |
55 return 0; | |
56 | |
57 op = XEXP (op, 0); | |
58 | |
59 return (memory_address_p (mode, op) && IS_INDEX_ADDR_P (op)); | |
60 }) | |
61 | |
62 ;; Return 1 iff OP is a symbolic operand. | |
63 ;; Note: an inline copy of this code is present in pa_secondary_reload. | |
64 | |
65 (define_predicate "symbolic_operand" | |
66 (match_code "symbol_ref,label_ref,const") | |
67 { | |
68 switch (GET_CODE (op)) | |
69 { | |
70 case SYMBOL_REF: | |
71 return !SYMBOL_REF_TLS_MODEL (op); | |
72 case LABEL_REF: | |
73 return 1; | |
74 case CONST: | |
75 op = XEXP (op, 0); | |
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76 return (GET_CODE (op) == PLUS |
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77 && ((GET_CODE (XEXP (op, 0)) == SYMBOL_REF |
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78 && !SYMBOL_REF_TLS_MODEL (XEXP (op, 0))) |
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79 || GET_CODE (XEXP (op, 0)) == LABEL_REF) |
0 | 80 && GET_CODE (XEXP (op, 1)) == CONST_INT); |
81 default: | |
82 return 0; | |
83 } | |
84 }) | |
85 | |
86 ;; Return truth value of statement that OP is a symbolic memory | |
87 ;; operand of mode MODE. | |
88 | |
89 (define_predicate "symbolic_memory_operand" | |
90 (match_code "subreg,mem") | |
91 { | |
92 if (GET_CODE (op) == SUBREG) | |
93 op = SUBREG_REG (op); | |
94 if (GET_CODE (op) != MEM) | |
95 return 0; | |
96 op = XEXP (op, 0); | |
97 return ((GET_CODE (op) == SYMBOL_REF && !SYMBOL_REF_TLS_MODEL (op)) | |
98 || GET_CODE (op) == CONST || GET_CODE (op) == HIGH | |
99 || GET_CODE (op) == LABEL_REF); | |
100 }) | |
101 | |
102 ;; Return true if OP is a symbolic operand for the TLS Global Dynamic model. | |
103 (define_predicate "tgd_symbolic_operand" | |
104 (and (match_code "symbol_ref") | |
105 (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_GLOBAL_DYNAMIC"))) | |
106 | |
107 ;; Return true if OP is a symbolic operand for the TLS Local Dynamic model. | |
108 (define_predicate "tld_symbolic_operand" | |
109 (and (match_code "symbol_ref") | |
110 (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_LOCAL_DYNAMIC"))) | |
111 | |
112 ;; Return true if OP is a symbolic operand for the TLS Initial Exec model. | |
113 (define_predicate "tie_symbolic_operand" | |
114 (and (match_code "symbol_ref") | |
115 (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_INITIAL_EXEC"))) | |
116 | |
117 ;; Return true if OP is a symbolic operand for the TLS Local Exec model. | |
118 (define_predicate "tle_symbolic_operand" | |
119 (and (match_code "symbol_ref") | |
120 (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_LOCAL_EXEC"))) | |
121 | |
122 | |
123 ;; Return 1 if the operand is a register operand or a non-symbolic | |
124 ;; memory operand after reload. This predicate is used for branch | |
125 ;; patterns that internally handle register reloading. We need to | |
126 ;; accept non-symbolic memory operands after reload to ensure that the | |
127 ;; pattern is still valid if reload didn't find a hard register for | |
128 ;; the operand. | |
129 | |
130 (define_predicate "reg_before_reload_operand" | |
131 (match_code "reg,mem") | |
132 { | |
133 /* Don't accept a SUBREG since it will need a reload. */ | |
134 if (GET_CODE (op) == SUBREG) | |
135 return 0; | |
136 | |
137 if (register_operand (op, mode)) | |
138 return 1; | |
139 | |
140 if (reload_completed | |
141 && memory_operand (op, mode) | |
142 && !symbolic_memory_operand (op, mode)) | |
143 return 1; | |
144 | |
145 return 0; | |
146 }) | |
147 | |
148 ;; Return 1 if the operand is either a register, zero, or a memory | |
149 ;; operand that is not symbolic. | |
150 | |
151 (define_predicate "reg_or_0_or_nonsymb_mem_operand" | |
152 (match_code "subreg,reg,mem,const_int,const_double") | |
153 { | |
154 if (register_operand (op, mode)) | |
155 return 1; | |
156 | |
157 if (op == CONST0_RTX (mode)) | |
158 return 1; | |
159 | |
160 if (GET_CODE (op) == SUBREG) | |
161 op = SUBREG_REG (op); | |
162 | |
163 if (GET_CODE (op) != MEM) | |
164 return 0; | |
165 | |
166 /* Until problems with management of the REG_POINTER flag are resolved, | |
167 we need to delay creating move insns with unscaled indexed addresses | |
168 until CSE is not expected. */ | |
169 if (!TARGET_NO_SPACE_REGS | |
170 && !cse_not_expected | |
171 && GET_CODE (XEXP (op, 0)) == PLUS | |
172 && REG_P (XEXP (XEXP (op, 0), 0)) | |
173 && REG_P (XEXP (XEXP (op, 0), 1))) | |
174 return 0; | |
175 | |
176 return (!symbolic_memory_operand (op, mode) | |
177 && memory_address_p (mode, XEXP (op, 0))); | |
178 }) | |
179 | |
180 ;; Accept anything that can be used as a destination operand for a | |
181 ;; move instruction. We don't accept indexed memory operands since | |
182 ;; they are supported only for floating point stores. | |
183 | |
184 (define_predicate "move_dest_operand" | |
185 (match_code "subreg,reg,mem") | |
186 { | |
187 if (register_operand (op, mode)) | |
188 return 1; | |
189 | |
190 if (GET_MODE (op) != mode) | |
191 return 0; | |
192 | |
193 if (GET_CODE (op) == SUBREG) | |
194 op = SUBREG_REG (op); | |
195 | |
196 if (GET_CODE (op) != MEM || symbolic_memory_operand (op, mode)) | |
197 return 0; | |
198 | |
199 op = XEXP (op, 0); | |
200 | |
201 return (memory_address_p (mode, op) | |
202 && !IS_INDEX_ADDR_P (op) | |
203 && !IS_LO_SUM_DLT_ADDR_P (op)); | |
204 }) | |
205 | |
206 ;; Accept anything that can be used as a source operand for a move | |
207 ;; instruction. | |
208 | |
209 (define_predicate "move_src_operand" | |
210 (match_code "subreg,reg,const_int,const_double,mem") | |
211 { | |
212 if (register_operand (op, mode)) | |
213 return 1; | |
214 | |
215 if (op == CONST0_RTX (mode)) | |
216 return 1; | |
217 | |
218 if (GET_CODE (op) == CONST_INT) | |
219 return cint_ok_for_move (INTVAL (op)); | |
220 | |
221 if (GET_MODE (op) != mode) | |
222 return 0; | |
223 | |
224 if (GET_CODE (op) == SUBREG) | |
225 op = SUBREG_REG (op); | |
226 | |
227 if (GET_CODE (op) != MEM) | |
228 return 0; | |
229 | |
230 /* Until problems with management of the REG_POINTER flag are resolved, | |
231 we need to delay creating move insns with unscaled indexed addresses | |
232 until CSE is not expected. */ | |
233 if (!TARGET_NO_SPACE_REGS | |
234 && !cse_not_expected | |
235 && GET_CODE (XEXP (op, 0)) == PLUS | |
236 && REG_P (XEXP (XEXP (op, 0), 0)) | |
237 && REG_P (XEXP (XEXP (op, 0), 1))) | |
238 return 0; | |
239 | |
240 return memory_address_p (mode, XEXP (op, 0)); | |
241 }) | |
242 | |
243 ;; Accept REG and any CONST_INT that can be moved in one instruction | |
244 ;; into a general register. | |
245 | |
246 (define_predicate "reg_or_cint_move_operand" | |
247 (match_code "subreg,reg,const_int") | |
248 { | |
249 if (register_operand (op, mode)) | |
250 return 1; | |
251 | |
252 return (GET_CODE (op) == CONST_INT && cint_ok_for_move (INTVAL (op))); | |
253 }) | |
254 | |
255 ;; TODO: Add a comment here. | |
256 | |
257 (define_predicate "pic_label_operand" | |
258 (match_code "label_ref,const") | |
259 { | |
260 if (!flag_pic) | |
261 return 0; | |
262 | |
263 switch (GET_CODE (op)) | |
264 { | |
265 case LABEL_REF: | |
266 return 1; | |
267 case CONST: | |
268 op = XEXP (op, 0); | |
269 return (GET_CODE (XEXP (op, 0)) == LABEL_REF | |
270 && GET_CODE (XEXP (op, 1)) == CONST_INT); | |
271 default: | |
272 return 0; | |
273 } | |
274 }) | |
275 | |
276 ;; TODO: Add a comment here. | |
277 | |
278 (define_predicate "fp_reg_operand" | |
279 (match_code "reg") | |
280 { | |
281 return reg_renumber && FP_REG_P (op); | |
282 }) | |
283 | |
284 ;; Return truth value of whether OP can be used as an operand in a | |
285 ;; three operand arithmetic insn that accepts registers of mode MODE | |
286 ;; or 14-bit signed integers. | |
287 | |
288 (define_predicate "arith_operand" | |
289 (match_code "subreg,reg,const_int") | |
290 { | |
291 return (register_operand (op, mode) | |
292 || (GET_CODE (op) == CONST_INT && INT_14_BITS (op))); | |
293 }) | |
294 | |
295 ;; Return truth value of whether OP can be used as an operand in a | |
296 ;; three operand arithmetic insn that accepts registers of mode MODE | |
297 ;; or 11-bit signed integers. | |
298 | |
299 (define_predicate "arith11_operand" | |
300 (match_code "subreg,reg,const_int") | |
301 { | |
302 return (register_operand (op, mode) | |
303 || (GET_CODE (op) == CONST_INT && INT_11_BITS (op))); | |
304 }) | |
305 | |
306 ;; A constant integer suitable for use in a PRE_MODIFY memory | |
307 ;; reference. | |
308 | |
309 (define_predicate "pre_cint_operand" | |
310 (match_code "const_int") | |
311 { | |
312 return (GET_CODE (op) == CONST_INT | |
313 && INTVAL (op) >= -0x2000 && INTVAL (op) < 0x10); | |
314 }) | |
315 | |
316 ;; A constant integer suitable for use in a POST_MODIFY memory | |
317 ;; reference. | |
318 | |
319 (define_predicate "post_cint_operand" | |
320 (match_code "const_int") | |
321 { | |
322 return (GET_CODE (op) == CONST_INT | |
323 && INTVAL (op) < 0x2000 && INTVAL (op) >= -0x10); | |
324 }) | |
325 | |
326 ;; TODO: Add a comment here. | |
327 | |
328 (define_predicate "arith_double_operand" | |
329 (match_code "subreg,reg,const_double") | |
330 { | |
331 return (register_operand (op, mode) | |
332 || (GET_CODE (op) == CONST_DOUBLE | |
333 && GET_MODE (op) == mode | |
334 && VAL_14_BITS_P (CONST_DOUBLE_LOW (op)) | |
335 && ((CONST_DOUBLE_HIGH (op) >= 0) | |
336 == ((CONST_DOUBLE_LOW (op) & 0x1000) == 0)))); | |
337 }) | |
338 | |
339 ;; Return truth value of whether OP is an integer which fits the range | |
340 ;; constraining immediate operands in three-address insns, or is an | |
341 ;; integer register. | |
342 | |
343 (define_predicate "ireg_or_int5_operand" | |
344 (match_code "const_int,reg") | |
345 { | |
346 return ((GET_CODE (op) == CONST_INT && INT_5_BITS (op)) | |
347 || (GET_CODE (op) == REG && REGNO (op) > 0 && REGNO (op) < 32)); | |
348 }) | |
349 | |
350 ;; Return truth value of whether OP is an integer which fits the range | |
351 ;; constraining immediate operands in three-address insns. | |
352 | |
353 (define_predicate "int5_operand" | |
354 (match_code "const_int") | |
355 { | |
356 return (GET_CODE (op) == CONST_INT && INT_5_BITS (op)); | |
357 }) | |
358 | |
359 ;; Return truth value of whether OP is an integer which fits the range | |
360 ;; constraining immediate operands in three-address insns. | |
361 | |
362 (define_predicate "uint5_operand" | |
363 (match_code "const_int") | |
364 { | |
365 return (GET_CODE (op) == CONST_INT && INT_U5_BITS (op)); | |
366 }) | |
367 | |
368 ;; Return truth value of whether OP is an integer which fits the range | |
369 ;; constraining immediate operands in three-address insns. | |
370 | |
371 (define_predicate "int11_operand" | |
372 (match_code "const_int") | |
373 { | |
374 return (GET_CODE (op) == CONST_INT && INT_11_BITS (op)); | |
375 }) | |
376 | |
377 ;; Return truth value of whether OP is an integer which fits the range | |
378 ;; constraining immediate operands in three-address insns. | |
379 | |
380 (define_predicate "uint32_operand" | |
381 (match_code "const_int,const_double") | |
382 { | |
383 #if HOST_BITS_PER_WIDE_INT > 32 | |
384 /* All allowed constants will fit a CONST_INT. */ | |
385 return (GET_CODE (op) == CONST_INT | |
386 && (INTVAL (op) >= 0 && INTVAL (op) < (HOST_WIDE_INT) 1 << 32)); | |
387 #else | |
388 return (GET_CODE (op) == CONST_INT | |
389 || (GET_CODE (op) == CONST_DOUBLE | |
390 && CONST_DOUBLE_HIGH (op) == 0)); | |
391 #endif | |
392 }) | |
393 | |
394 ;; Return truth value of whether OP is an integer which fits the range | |
395 ;; constraining immediate operands in three-address insns. | |
396 | |
397 (define_predicate "arith5_operand" | |
398 (match_code "subreg,reg,const_int") | |
399 { | |
400 return register_operand (op, mode) || int5_operand (op, mode); | |
401 }) | |
402 | |
403 ;; True iff depi or extru can be used to compute (reg & OP). | |
404 | |
405 (define_predicate "and_operand" | |
406 (match_code "subreg,reg,const_int") | |
407 { | |
408 return (register_operand (op, mode) | |
409 || (GET_CODE (op) == CONST_INT && and_mask_p (INTVAL (op)))); | |
410 }) | |
411 | |
412 ;; True iff depi can be used to compute (reg | OP). | |
413 | |
414 (define_predicate "ior_operand" | |
415 (match_code "const_int") | |
416 { | |
417 return (GET_CODE (op) == CONST_INT && ior_mask_p (INTVAL (op))); | |
418 }) | |
419 | |
420 ;; True iff OP is a CONST_INT of the forms 0...0xxxx or | |
421 ;; 0...01...1xxxx. Such values can be the left hand side x in (x << | |
422 ;; r), using the zvdepi instruction. | |
423 | |
424 (define_predicate "lhs_lshift_cint_operand" | |
425 (match_code "const_int") | |
426 { | |
427 unsigned HOST_WIDE_INT x; | |
428 if (GET_CODE (op) != CONST_INT) | |
429 return 0; | |
430 x = INTVAL (op) >> 4; | |
431 return (x & (x + 1)) == 0; | |
432 }) | |
433 | |
434 ;; TODO: Add a comment here. | |
435 | |
436 (define_predicate "lhs_lshift_operand" | |
437 (match_code "subreg,reg,const_int") | |
438 { | |
439 return register_operand (op, mode) || lhs_lshift_cint_operand (op, mode); | |
440 }) | |
441 | |
442 ;; TODO: Add a comment here. | |
443 | |
444 (define_predicate "arith32_operand" | |
445 (match_code "subreg,reg,const_int") | |
446 { | |
447 return register_operand (op, mode) || GET_CODE (op) == CONST_INT; | |
448 }) | |
449 | |
450 ;; TODO: Add a comment here. | |
451 | |
452 (define_predicate "pc_or_label_operand" | |
453 (match_code "pc,label_ref") | |
454 { | |
455 return (GET_CODE (op) == PC || GET_CODE (op) == LABEL_REF); | |
456 }) | |
457 | |
458 ;; TODO: Add a comment here. | |
459 | |
460 (define_predicate "plus_xor_ior_operator" | |
461 (match_code "plus,xor,ior") | |
462 { | |
463 return (GET_CODE (op) == PLUS || GET_CODE (op) == XOR | |
464 || GET_CODE (op) == IOR); | |
465 }) | |
466 | |
467 ;; Return 1 if OP is a CONST_INT with the value 2, 4, or 8. These are | |
468 ;; the valid constant for shadd instructions. | |
469 | |
470 (define_predicate "shadd_operand" | |
471 (match_code "const_int") | |
472 { | |
473 return (GET_CODE (op) == CONST_INT && shadd_constant_p (INTVAL (op))); | |
474 }) | |
475 | |
476 ;; TODO: Add a comment here. | |
477 | |
478 (define_predicate "div_operand" | |
479 (match_code "reg,const_int") | |
480 { | |
481 return (mode == SImode | |
482 && ((GET_CODE (op) == REG && REGNO (op) == 25) | |
483 || (GET_CODE (op) == CONST_INT && INTVAL (op) > 0 | |
484 && INTVAL (op) < 16 && magic_milli[INTVAL (op)]))); | |
485 }) | |
486 | |
487 ;; Return nonzero if OP is an integer register, else return zero. | |
488 | |
489 (define_predicate "ireg_operand" | |
490 (match_code "reg") | |
491 { | |
492 return (GET_CODE (op) == REG && REGNO (op) > 0 && REGNO (op) < 32); | |
493 }) | |
494 | |
495 ;; Return 1 if this is a comparison operator. This allows the use of | |
496 ;; MATCH_OPERATOR to recognize all the branch insns. | |
497 | |
498 (define_predicate "cmpib_comparison_operator" | |
499 (match_code "eq,ne,lt,le,leu,gt,gtu,ge") | |
500 { | |
501 return ((mode == VOIDmode || GET_MODE (op) == mode) | |
502 && (GET_CODE (op) == EQ | |
503 || GET_CODE (op) == NE | |
504 || GET_CODE (op) == GT | |
505 || GET_CODE (op) == GTU | |
506 || GET_CODE (op) == GE | |
507 || GET_CODE (op) == LT | |
508 || GET_CODE (op) == LE | |
509 || GET_CODE (op) == LEU)); | |
510 }) | |
511 | |
512 ;; Return 1 if OP is an operator suitable for use in a movb | |
513 ;; instruction. | |
514 | |
515 (define_predicate "movb_comparison_operator" | |
516 (match_code "eq,ne,lt,ge") | |
517 { | |
518 return (GET_CODE (op) == EQ || GET_CODE (op) == NE | |
519 || GET_CODE (op) == LT || GET_CODE (op) == GE); | |
520 }) |