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comparison gcc/config/rs6000/8540.md @ 111:04ced10e8804

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gcc 7
author kono
date Fri, 27 Oct 2017 22:46:09 +0900
parents 77e2b8dfacca
children 84e7813d76e9
comparison
equal deleted inserted replaced
68:561a7518be6b 111:04ced10e8804
1 ;; Pipeline description for Motorola PowerPC 8540 processor. 1 ;; Pipeline description for Motorola PowerPC 8540 processor.
2 ;; Copyright (C) 2003, 2004, 2007, 2009 Free Software Foundation, Inc. 2 ;; Copyright (C) 2003-2017 Free Software Foundation, Inc.
3 ;; 3 ;;
4 ;; This file is part of GCC. 4 ;; This file is part of GCC.
5 5
6 ;; GCC is free software; you can redistribute it and/or modify it 6 ;; GCC is free software; you can redistribute it and/or modify it
7 ;; under the terms of the GNU General Public License as published 7 ;; under the terms of the GNU General Public License as published
82 (define_reservation "ppc8540_su_stage0" 82 (define_reservation "ppc8540_su_stage0"
83 "ppc8540_su0_stage0|ppc8540_su1_stage0+present_ppc8540_su0_stage0") 83 "ppc8540_su0_stage0|ppc8540_su1_stage0+present_ppc8540_su0_stage0")
84 84
85 ;; Simple SU insns 85 ;; Simple SU insns
86 (define_insn_reservation "ppc8540_su" 1 86 (define_insn_reservation "ppc8540_su" 1
87 (and (eq_attr "type" "integer,insert_word,insert_dword,cmp,compare,\ 87 (and (eq_attr "type" "integer,add,logical,insert,cmp,\
88 delayed_compare,var_delayed_compare,fast_compare,\ 88 shift,trap,cntlz,exts,isel")
89 shift,trap,var_shift_rotate,cntlz,exts,isel") 89 (eq_attr "cpu" "ppc8540,ppc8548"))
90 (eq_attr "cpu" "ppc8540"))
91 "ppc8540_decode,ppc8540_issue+ppc8540_su_stage0+ppc8540_retire") 90 "ppc8540_decode,ppc8540_issue+ppc8540_su_stage0+ppc8540_retire")
92 91
93 (define_insn_reservation "ppc8540_two" 1 92 (define_insn_reservation "ppc8540_two" 1
94 (and (eq_attr "type" "two") 93 (and (eq_attr "type" "two")
95 (eq_attr "cpu" "ppc8540")) 94 (eq_attr "cpu" "ppc8540,ppc8548"))
96 "ppc8540_decode,ppc8540_issue+ppc8540_su_stage0+ppc8540_retire,\ 95 "ppc8540_decode,ppc8540_issue+ppc8540_su_stage0+ppc8540_retire,\
97 ppc8540_issue+ppc8540_su_stage0+ppc8540_retire") 96 ppc8540_issue+ppc8540_su_stage0+ppc8540_retire")
98 97
99 (define_insn_reservation "ppc8540_three" 1 98 (define_insn_reservation "ppc8540_three" 1
100 (and (eq_attr "type" "three") 99 (and (eq_attr "type" "three")
101 (eq_attr "cpu" "ppc8540")) 100 (eq_attr "cpu" "ppc8540,ppc8548"))
102 "ppc8540_decode,ppc8540_issue+ppc8540_su_stage0+ppc8540_retire,\ 101 "ppc8540_decode,ppc8540_issue+ppc8540_su_stage0+ppc8540_retire,\
103 ppc8540_issue+ppc8540_su_stage0+ppc8540_retire,\ 102 ppc8540_issue+ppc8540_su_stage0+ppc8540_retire,\
104 ppc8540_issue+ppc8540_su_stage0+ppc8540_retire") 103 ppc8540_issue+ppc8540_su_stage0+ppc8540_retire")
105 104
106 ;; Branch. Actually this latency time is not used by the scheduler. 105 ;; Branch. Actually this latency time is not used by the scheduler.
107 (define_insn_reservation "ppc8540_branch" 1 106 (define_insn_reservation "ppc8540_branch" 1
108 (and (eq_attr "type" "jmpreg,branch,isync") 107 (and (eq_attr "type" "jmpreg,branch,isync")
109 (eq_attr "cpu" "ppc8540")) 108 (eq_attr "cpu" "ppc8540,ppc8548"))
110 "ppc8540_decode,ppc8540_bu,ppc8540_retire") 109 "ppc8540_decode,ppc8540_bu,ppc8540_retire")
111 110
112 ;; Multiply 111 ;; Multiply
113 (define_insn_reservation "ppc8540_multiply" 4 112 (define_insn_reservation "ppc8540_multiply" 4
114 (and (eq_attr "type" "imul,imul2,imul3,imul_compare") 113 (and (eq_attr "type" "mul")
115 (eq_attr "cpu" "ppc8540")) 114 (eq_attr "cpu" "ppc8540,ppc8548"))
116 "ppc8540_decode,ppc8540_issue+ppc8540_mu_stage0,ppc8540_mu_stage1,\ 115 "ppc8540_decode,ppc8540_issue+ppc8540_mu_stage0,ppc8540_mu_stage1,\
117 ppc8540_mu_stage2,ppc8540_mu_stage3+ppc8540_retire") 116 ppc8540_mu_stage2,ppc8540_mu_stage3+ppc8540_retire")
118 117
119 ;; Divide. We use the average latency time here. We omit reserving a 118 ;; Divide. We use the average latency time here. We omit reserving a
120 ;; retire unit because of the result automata will be huge. We ignore 119 ;; retire unit because of the result automata will be huge. We ignore
121 ;; reservation of miu_stage3 here because we use the average latency 120 ;; reservation of miu_stage3 here because we use the average latency
122 ;; time. 121 ;; time.
123 (define_insn_reservation "ppc8540_divide" 14 122 (define_insn_reservation "ppc8540_divide" 14
124 (and (eq_attr "type" "idiv") 123 (and (eq_attr "type" "div")
125 (eq_attr "cpu" "ppc8540")) 124 (eq_attr "cpu" "ppc8540,ppc8548"))
126 "ppc8540_decode,ppc8540_issue+ppc8540_mu_stage0+ppc8540_mu_div,\ 125 "ppc8540_decode,ppc8540_issue+ppc8540_mu_stage0+ppc8540_mu_div,\
127 ppc8540_mu_div*13") 126 ppc8540_mu_div*13")
128 127
129 ;; CR logical 128 ;; CR logical
130 (define_insn_reservation "ppc8540_cr_logical" 1 129 (define_insn_reservation "ppc8540_cr_logical" 1
131 (and (eq_attr "type" "cr_logical,delayed_cr") 130 (and (eq_attr "type" "cr_logical,delayed_cr")
132 (eq_attr "cpu" "ppc8540")) 131 (eq_attr "cpu" "ppc8540,ppc8548"))
133 "ppc8540_decode,ppc8540_bu,ppc8540_retire") 132 "ppc8540_decode,ppc8540_bu,ppc8540_retire")
134 133
135 ;; Mfcr 134 ;; Mfcr
136 (define_insn_reservation "ppc8540_mfcr" 1 135 (define_insn_reservation "ppc8540_mfcr" 1
137 (and (eq_attr "type" "mfcr") 136 (and (eq_attr "type" "mfcr")
138 (eq_attr "cpu" "ppc8540")) 137 (eq_attr "cpu" "ppc8540,ppc8548"))
139 "ppc8540_decode,ppc8540_issue+ppc8540_su1_stage0+ppc8540_retire") 138 "ppc8540_decode,ppc8540_issue+ppc8540_su1_stage0+ppc8540_retire")
140 139
141 ;; Mtcrf 140 ;; Mtcrf
142 (define_insn_reservation "ppc8540_mtcrf" 1 141 (define_insn_reservation "ppc8540_mtcrf" 1
143 (and (eq_attr "type" "mtcr") 142 (and (eq_attr "type" "mtcr")
144 (eq_attr "cpu" "ppc8540")) 143 (eq_attr "cpu" "ppc8540,ppc8548"))
145 "ppc8540_decode,ppc8540_issue+ppc8540_su1_stage0+ppc8540_retire") 144 "ppc8540_decode,ppc8540_issue+ppc8540_su1_stage0+ppc8540_retire")
146 145
147 ;; Mtjmpr 146 ;; Mtjmpr
148 (define_insn_reservation "ppc8540_mtjmpr" 1 147 (define_insn_reservation "ppc8540_mtjmpr" 1
149 (and (eq_attr "type" "mtjmpr,mfjmpr") 148 (and (eq_attr "type" "mtjmpr,mfjmpr")
150 (eq_attr "cpu" "ppc8540")) 149 (eq_attr "cpu" "ppc8540,ppc8548"))
151 "ppc8540_decode,ppc8540_issue+ppc8540_su_stage0+ppc8540_retire") 150 "ppc8540_decode,ppc8540_issue+ppc8540_su_stage0+ppc8540_retire")
152 151
153 ;; Loads 152 ;; Loads
154 (define_insn_reservation "ppc8540_load" 3 153 (define_insn_reservation "ppc8540_load" 3
155 (and (eq_attr "type" "load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u,\ 154 (and (eq_attr "type" "load,load_l,sync")
156 load_l,sync") 155 (eq_attr "cpu" "ppc8540,ppc8548"))
157 (eq_attr "cpu" "ppc8540"))
158 "ppc8540_decode,ppc8540_issue+ppc8540_lsu,nothing,ppc8540_retire") 156 "ppc8540_decode,ppc8540_issue+ppc8540_lsu,nothing,ppc8540_retire")
159 157
160 ;; Stores. 158 ;; Stores.
161 (define_insn_reservation "ppc8540_store" 3 159 (define_insn_reservation "ppc8540_store" 3
162 (and (eq_attr "type" "store,store_ux,store_u,store_c") 160 (and (eq_attr "type" "store,store_c")
163 (eq_attr "cpu" "ppc8540")) 161 (eq_attr "cpu" "ppc8540,ppc8548"))
164 "ppc8540_decode,ppc8540_issue+ppc8540_lsu,nothing,ppc8540_retire") 162 "ppc8540_decode,ppc8540_issue+ppc8540_lsu,nothing,ppc8540_retire")
165 163
166 ;; Simple FP 164 ;; Simple FP
167 (define_insn_reservation "ppc8540_simple_float" 1 165 (define_insn_reservation "ppc8540_simple_float" 1
168 (and (eq_attr "type" "fpsimple") 166 (and (eq_attr "type" "fpsimple")
169 (eq_attr "cpu" "ppc8540")) 167 (eq_attr "cpu" "ppc8540,ppc8548"))
170 "ppc8540_decode,ppc8540_issue+ppc8540_su_stage0+ppc8540_retire") 168 "ppc8540_decode,ppc8540_issue+ppc8540_su_stage0+ppc8540_retire")
171 169
172 ;; FP 170 ;; FP
173 (define_insn_reservation "ppc8540_float" 4 171 (define_insn_reservation "ppc8540_float" 4
174 (and (eq_attr "type" "fp") 172 (and (eq_attr "type" "fp")
175 (eq_attr "cpu" "ppc8540")) 173 (eq_attr "cpu" "ppc8540,ppc8548"))
176 "ppc8540_decode,ppc8540_issue+ppc8540_mu_stage0,ppc8540_mu_stage1,\ 174 "ppc8540_decode,ppc8540_issue+ppc8540_mu_stage0,ppc8540_mu_stage1,\
177 ppc8540_mu_stage2,ppc8540_mu_stage3+ppc8540_retire") 175 ppc8540_mu_stage2,ppc8540_mu_stage3+ppc8540_retire")
178 176
179 ;; float divides. We omit reserving a retire unit and miu_stage3 177 ;; float divides. We omit reserving a retire unit and miu_stage3
180 ;; because of the result automata will be huge. 178 ;; because of the result automata will be huge.
181 (define_insn_reservation "ppc8540_float_vector_divide" 29 179 (define_insn_reservation "ppc8540_float_vector_divide" 29
182 (and (eq_attr "type" "vecfdiv") 180 (and (eq_attr "type" "vecfdiv")
183 (eq_attr "cpu" "ppc8540")) 181 (eq_attr "cpu" "ppc8540,ppc8548"))
184 "ppc8540_decode,ppc8540_issue+ppc8540_mu_stage0+ppc8540_mu_div,\ 182 "ppc8540_decode,ppc8540_issue+ppc8540_mu_stage0+ppc8540_mu_div,\
185 ppc8540_mu_div*28") 183 ppc8540_mu_div*28")
186 184
187 ;; Brinc
188 (define_insn_reservation "ppc8540_brinc" 1
189 (and (eq_attr "type" "brinc")
190 (eq_attr "cpu" "ppc8540"))
191 "ppc8540_decode,ppc8540_issue+ppc8540_su_stage0+ppc8540_retire")
192
193 ;; Simple vector 185 ;; Simple vector
194 (define_insn_reservation "ppc8540_simple_vector" 1 186 (define_insn_reservation "ppc8540_simple_vector" 1
195 (and (eq_attr "type" "vecsimple") 187 (and (eq_attr "type" "vecsimple,veclogical,vecmove")
196 (eq_attr "cpu" "ppc8540")) 188 (eq_attr "cpu" "ppc8540,ppc8548"))
197 "ppc8540_decode,ppc8540_issue+ppc8540_su1_stage0+ppc8540_retire") 189 "ppc8540_decode,ppc8540_issue+ppc8540_su1_stage0+ppc8540_retire")
198 190
199 ;; Simple vector compare 191 ;; Simple vector compare
200 (define_insn_reservation "ppc8540_simple_vector_compare" 1 192 (define_insn_reservation "ppc8540_simple_vector_compare" 1
201 (and (eq_attr "type" "veccmpsimple") 193 (and (eq_attr "type" "veccmpsimple")
202 (eq_attr "cpu" "ppc8540")) 194 (eq_attr "cpu" "ppc8540,ppc8548"))
203 "ppc8540_decode,ppc8540_issue+ppc8540_su_stage0+ppc8540_retire") 195 "ppc8540_decode,ppc8540_issue+ppc8540_su_stage0+ppc8540_retire")
204 196
205 ;; Vector compare 197 ;; Vector compare
206 (define_insn_reservation "ppc8540_vector_compare" 1 198 (define_insn_reservation "ppc8540_vector_compare" 1
207 (and (eq_attr "type" "veccmp") 199 (and (eq_attr "type" "veccmp,veccmpfx")
208 (eq_attr "cpu" "ppc8540")) 200 (eq_attr "cpu" "ppc8540,ppc8548"))
209 "ppc8540_decode,ppc8540_issue+ppc8540_su1_stage0+ppc8540_retire") 201 "ppc8540_decode,ppc8540_issue+ppc8540_su1_stage0+ppc8540_retire")
210 202
211 ;; evsplatfi evsplati 203 ;; evsplatfi evsplati
212 (define_insn_reservation "ppc8540_vector_perm" 1 204 (define_insn_reservation "ppc8540_vector_perm" 1
213 (and (eq_attr "type" "vecperm") 205 (and (eq_attr "type" "vecperm")
214 (eq_attr "cpu" "ppc8540")) 206 (eq_attr "cpu" "ppc8540,ppc8548"))
215 "ppc8540_decode,ppc8540_issue+ppc8540_su1_stage0+ppc8540_retire") 207 "ppc8540_decode,ppc8540_issue+ppc8540_su1_stage0+ppc8540_retire")
216 208
217 ;; Vector float 209 ;; Vector float
218 (define_insn_reservation "ppc8540_float_vector" 4 210 (define_insn_reservation "ppc8540_float_vector" 4
219 (and (eq_attr "type" "vecfloat") 211 (and (eq_attr "type" "vecfloat")
220 (eq_attr "cpu" "ppc8540")) 212 (eq_attr "cpu" "ppc8540,ppc8548"))
221 "ppc8540_decode,ppc8540_issue+ppc8540_mu_stage0,ppc8540_mu_stage1,\ 213 "ppc8540_decode,ppc8540_issue+ppc8540_mu_stage0,ppc8540_mu_stage1,\
222 ppc8540_mu_stage2,ppc8540_mu_stage3+ppc8540_retire") 214 ppc8540_mu_stage2,ppc8540_mu_stage3+ppc8540_retire")
223 215
224 ;; Vector divides: Use the average. We omit reserving a retire unit 216 ;; Vector divides: Use the average. We omit reserving a retire unit
225 ;; because of the result automata will be huge. We ignore reservation 217 ;; because of the result automata will be huge. We ignore reservation
226 ;; of miu_stage3 here because we use the average latency time. 218 ;; of miu_stage3 here because we use the average latency time.
227 (define_insn_reservation "ppc8540_vector_divide" 14 219 (define_insn_reservation "ppc8540_vector_divide" 14
228 (and (eq_attr "type" "vecdiv") 220 (and (eq_attr "type" "vecdiv")
229 (eq_attr "cpu" "ppc8540")) 221 (eq_attr "cpu" "ppc8540,ppc8548"))
230 "ppc8540_decode,ppc8540_issue+ppc8540_mu_stage0+ppc8540_mu_div,\ 222 "ppc8540_decode,ppc8540_issue+ppc8540_mu_stage0+ppc8540_mu_div,\
231 ppc8540_mu_div*13") 223 ppc8540_mu_div*13")
232 224
233 ;; Complex vector. 225 ;; Complex vector.
234 (define_insn_reservation "ppc8540_complex_vector" 4 226 (define_insn_reservation "ppc8540_complex_vector" 4
235 (and (eq_attr "type" "veccomplex") 227 (and (eq_attr "type" "veccomplex")
236 (eq_attr "cpu" "ppc8540")) 228 (eq_attr "cpu" "ppc8540,ppc8548"))
237 "ppc8540_decode,ppc8540_issue+ppc8540_mu_stage0,ppc8540_mu_stage1,\ 229 "ppc8540_decode,ppc8540_issue+ppc8540_mu_stage0,ppc8540_mu_stage1,\
238 ppc8540_mu_stage2,ppc8540_mu_stage3+ppc8540_retire") 230 ppc8540_mu_stage2,ppc8540_mu_stage3+ppc8540_retire")
239 231
240 ;; Vector load 232 ;; Vector load
241 (define_insn_reservation "ppc8540_vector_load" 3 233 (define_insn_reservation "ppc8540_vector_load" 3
242 (and (eq_attr "type" "vecload") 234 (and (eq_attr "type" "vecload")
243 (eq_attr "cpu" "ppc8540")) 235 (eq_attr "cpu" "ppc8540,ppc8548"))
244 "ppc8540_decode,ppc8540_issue+ppc8540_lsu,nothing,ppc8540_retire") 236 "ppc8540_decode,ppc8540_issue+ppc8540_lsu,nothing,ppc8540_retire")
245 237
246 ;; Vector store 238 ;; Vector store
247 (define_insn_reservation "ppc8540_vector_store" 3 239 (define_insn_reservation "ppc8540_vector_store" 3
248 (and (eq_attr "type" "vecstore") 240 (and (eq_attr "type" "vecstore")
249 (eq_attr "cpu" "ppc8540")) 241 (eq_attr "cpu" "ppc8540,ppc8548"))
250 "ppc8540_decode,ppc8540_issue+ppc8540_lsu,nothing,ppc8540_retire") 242 "ppc8540_decode,ppc8540_issue+ppc8540_lsu,nothing,ppc8540_retire")