--- a/gcc/config/rs6000/8540.md	Sun Aug 21 07:07:55 2011 +0900
+++ b/gcc/config/rs6000/8540.md	Fri Oct 27 22:46:09 2017 +0900
@@ -1,5 +1,5 @@
 ;; Pipeline description for Motorola PowerPC 8540 processor.
-;;   Copyright (C) 2003, 2004, 2007, 2009 Free Software Foundation, Inc.
+;;   Copyright (C) 2003-2017 Free Software Foundation, Inc.
 ;;
 ;; This file is part of GCC.
 
@@ -84,21 +84,20 @@
 
 ;; Simple SU insns
 (define_insn_reservation "ppc8540_su" 1
-  (and (eq_attr "type" "integer,insert_word,insert_dword,cmp,compare,\
-                        delayed_compare,var_delayed_compare,fast_compare,\
-                        shift,trap,var_shift_rotate,cntlz,exts,isel")
-       (eq_attr "cpu" "ppc8540"))
+  (and (eq_attr "type" "integer,add,logical,insert,cmp,\
+                        shift,trap,cntlz,exts,isel")
+       (eq_attr "cpu" "ppc8540,ppc8548"))
   "ppc8540_decode,ppc8540_issue+ppc8540_su_stage0+ppc8540_retire")
 
 (define_insn_reservation "ppc8540_two" 1
   (and (eq_attr "type" "two")
-       (eq_attr "cpu" "ppc8540"))
+       (eq_attr "cpu" "ppc8540,ppc8548"))
   "ppc8540_decode,ppc8540_issue+ppc8540_su_stage0+ppc8540_retire,\
    ppc8540_issue+ppc8540_su_stage0+ppc8540_retire")
 
 (define_insn_reservation "ppc8540_three" 1
   (and (eq_attr "type" "three")
-       (eq_attr "cpu" "ppc8540"))
+       (eq_attr "cpu" "ppc8540,ppc8548"))
   "ppc8540_decode,ppc8540_issue+ppc8540_su_stage0+ppc8540_retire,\
    ppc8540_issue+ppc8540_su_stage0+ppc8540_retire,\
    ppc8540_issue+ppc8540_su_stage0+ppc8540_retire")
@@ -106,13 +105,13 @@
 ;; Branch.  Actually this latency time is not used by the scheduler.
 (define_insn_reservation "ppc8540_branch" 1
   (and (eq_attr "type" "jmpreg,branch,isync")
-       (eq_attr "cpu" "ppc8540"))
+       (eq_attr "cpu" "ppc8540,ppc8548"))
   "ppc8540_decode,ppc8540_bu,ppc8540_retire")
 
 ;; Multiply
 (define_insn_reservation "ppc8540_multiply" 4
-  (and (eq_attr "type" "imul,imul2,imul3,imul_compare")
-       (eq_attr "cpu" "ppc8540"))
+  (and (eq_attr "type" "mul")
+       (eq_attr "cpu" "ppc8540,ppc8548"))
   "ppc8540_decode,ppc8540_issue+ppc8540_mu_stage0,ppc8540_mu_stage1,\
    ppc8540_mu_stage2,ppc8540_mu_stage3+ppc8540_retire")
 
@@ -121,58 +120,57 @@
 ;; reservation of miu_stage3 here because we use the average latency
 ;; time.
 (define_insn_reservation "ppc8540_divide" 14
-  (and (eq_attr "type" "idiv")
-       (eq_attr "cpu" "ppc8540"))
+  (and (eq_attr "type" "div")
+       (eq_attr "cpu" "ppc8540,ppc8548"))
   "ppc8540_decode,ppc8540_issue+ppc8540_mu_stage0+ppc8540_mu_div,\
    ppc8540_mu_div*13")
 
 ;; CR logical
 (define_insn_reservation "ppc8540_cr_logical" 1
   (and (eq_attr "type" "cr_logical,delayed_cr")
-       (eq_attr "cpu" "ppc8540"))
+       (eq_attr "cpu" "ppc8540,ppc8548"))
   "ppc8540_decode,ppc8540_bu,ppc8540_retire")
 
 ;; Mfcr
 (define_insn_reservation "ppc8540_mfcr" 1
   (and (eq_attr "type" "mfcr")
-       (eq_attr "cpu" "ppc8540"))
+       (eq_attr "cpu" "ppc8540,ppc8548"))
   "ppc8540_decode,ppc8540_issue+ppc8540_su1_stage0+ppc8540_retire")
 
 ;; Mtcrf
 (define_insn_reservation "ppc8540_mtcrf" 1
   (and (eq_attr "type" "mtcr")
-       (eq_attr "cpu" "ppc8540"))
+       (eq_attr "cpu" "ppc8540,ppc8548"))
   "ppc8540_decode,ppc8540_issue+ppc8540_su1_stage0+ppc8540_retire")
 
 ;; Mtjmpr
 (define_insn_reservation "ppc8540_mtjmpr" 1
   (and (eq_attr "type" "mtjmpr,mfjmpr")
-       (eq_attr "cpu" "ppc8540"))
+       (eq_attr "cpu" "ppc8540,ppc8548"))
   "ppc8540_decode,ppc8540_issue+ppc8540_su_stage0+ppc8540_retire")
 
 ;; Loads
 (define_insn_reservation "ppc8540_load" 3
-  (and (eq_attr "type" "load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u,\
-			load_l,sync")
-       (eq_attr "cpu" "ppc8540"))
+  (and (eq_attr "type" "load,load_l,sync")
+       (eq_attr "cpu" "ppc8540,ppc8548"))
   "ppc8540_decode,ppc8540_issue+ppc8540_lsu,nothing,ppc8540_retire")
 
 ;; Stores.
 (define_insn_reservation "ppc8540_store" 3
-  (and (eq_attr "type" "store,store_ux,store_u,store_c")
-       (eq_attr "cpu" "ppc8540"))
+  (and (eq_attr "type" "store,store_c")
+       (eq_attr "cpu" "ppc8540,ppc8548"))
   "ppc8540_decode,ppc8540_issue+ppc8540_lsu,nothing,ppc8540_retire")
 
 ;; Simple FP
 (define_insn_reservation "ppc8540_simple_float" 1
   (and (eq_attr "type" "fpsimple")
-       (eq_attr "cpu" "ppc8540"))
+       (eq_attr "cpu" "ppc8540,ppc8548"))
   "ppc8540_decode,ppc8540_issue+ppc8540_su_stage0+ppc8540_retire")
 
 ;; FP
 (define_insn_reservation "ppc8540_float" 4
   (and (eq_attr "type" "fp")
-       (eq_attr "cpu" "ppc8540"))
+       (eq_attr "cpu" "ppc8540,ppc8548"))
   "ppc8540_decode,ppc8540_issue+ppc8540_mu_stage0,ppc8540_mu_stage1,\
    ppc8540_mu_stage2,ppc8540_mu_stage3+ppc8540_retire")
 
@@ -180,44 +178,38 @@
 ;; because of the result automata will be huge.
 (define_insn_reservation "ppc8540_float_vector_divide" 29
   (and (eq_attr "type" "vecfdiv")
-       (eq_attr "cpu" "ppc8540"))
+       (eq_attr "cpu" "ppc8540,ppc8548"))
   "ppc8540_decode,ppc8540_issue+ppc8540_mu_stage0+ppc8540_mu_div,\
    ppc8540_mu_div*28")
 
-;; Brinc
-(define_insn_reservation "ppc8540_brinc" 1
-  (and (eq_attr "type" "brinc")
-       (eq_attr "cpu" "ppc8540"))
-  "ppc8540_decode,ppc8540_issue+ppc8540_su_stage0+ppc8540_retire")
-
 ;; Simple vector
 (define_insn_reservation "ppc8540_simple_vector" 1
-  (and (eq_attr "type" "vecsimple")
-       (eq_attr "cpu" "ppc8540"))
+  (and (eq_attr "type" "vecsimple,veclogical,vecmove")
+       (eq_attr "cpu" "ppc8540,ppc8548"))
   "ppc8540_decode,ppc8540_issue+ppc8540_su1_stage0+ppc8540_retire")
 
 ;; Simple vector compare
 (define_insn_reservation "ppc8540_simple_vector_compare" 1
   (and (eq_attr "type" "veccmpsimple")
-       (eq_attr "cpu" "ppc8540"))
+       (eq_attr "cpu" "ppc8540,ppc8548"))
   "ppc8540_decode,ppc8540_issue+ppc8540_su_stage0+ppc8540_retire")
 
 ;; Vector compare
 (define_insn_reservation "ppc8540_vector_compare" 1
-  (and (eq_attr "type" "veccmp")
-       (eq_attr "cpu" "ppc8540"))
+  (and (eq_attr "type" "veccmp,veccmpfx")
+       (eq_attr "cpu" "ppc8540,ppc8548"))
   "ppc8540_decode,ppc8540_issue+ppc8540_su1_stage0+ppc8540_retire")
 
 ;; evsplatfi evsplati
 (define_insn_reservation "ppc8540_vector_perm" 1
   (and (eq_attr "type" "vecperm")
-       (eq_attr "cpu" "ppc8540"))
+       (eq_attr "cpu" "ppc8540,ppc8548"))
   "ppc8540_decode,ppc8540_issue+ppc8540_su1_stage0+ppc8540_retire")
 
 ;; Vector float
 (define_insn_reservation "ppc8540_float_vector" 4
   (and (eq_attr "type" "vecfloat")
-       (eq_attr "cpu" "ppc8540"))
+       (eq_attr "cpu" "ppc8540,ppc8548"))
   "ppc8540_decode,ppc8540_issue+ppc8540_mu_stage0,ppc8540_mu_stage1,\
    ppc8540_mu_stage2,ppc8540_mu_stage3+ppc8540_retire")
 
@@ -226,25 +218,25 @@
 ;; of miu_stage3 here because we use the average latency time.
 (define_insn_reservation "ppc8540_vector_divide" 14
   (and (eq_attr "type" "vecdiv")
-       (eq_attr "cpu" "ppc8540"))
+       (eq_attr "cpu" "ppc8540,ppc8548"))
   "ppc8540_decode,ppc8540_issue+ppc8540_mu_stage0+ppc8540_mu_div,\
    ppc8540_mu_div*13")
 
 ;; Complex vector.
 (define_insn_reservation "ppc8540_complex_vector" 4
   (and (eq_attr "type" "veccomplex")
-       (eq_attr "cpu" "ppc8540"))
+       (eq_attr "cpu" "ppc8540,ppc8548"))
   "ppc8540_decode,ppc8540_issue+ppc8540_mu_stage0,ppc8540_mu_stage1,\
    ppc8540_mu_stage2,ppc8540_mu_stage3+ppc8540_retire")
 
 ;; Vector load
 (define_insn_reservation "ppc8540_vector_load" 3
   (and (eq_attr "type" "vecload")
-       (eq_attr "cpu" "ppc8540"))
+       (eq_attr "cpu" "ppc8540,ppc8548"))
   "ppc8540_decode,ppc8540_issue+ppc8540_lsu,nothing,ppc8540_retire")
 
 ;; Vector store
 (define_insn_reservation "ppc8540_vector_store" 3
   (and (eq_attr "type" "vecstore")
-       (eq_attr "cpu" "ppc8540"))
+       (eq_attr "cpu" "ppc8540,ppc8548"))
   "ppc8540_decode,ppc8540_issue+ppc8540_lsu,nothing,ppc8540_retire")