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comparison gcc/config/rs6000/e500mc.md @ 111:04ced10e8804

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gcc 7
author kono
date Fri, 27 Oct 2017 22:46:09 +0900
parents 77e2b8dfacca
children 84e7813d76e9
comparison
equal deleted inserted replaced
68:561a7518be6b 111:04ced10e8804
1 ;; Pipeline description for Motorola PowerPC e500mc core. 1 ;; Pipeline description for Motorola PowerPC e500mc core.
2 ;; Copyright (C) 2008 Free Software Foundation, Inc. 2 ;; Copyright (C) 2008-2017 Free Software Foundation, Inc.
3 ;; Contributed by Edmar Wienskoski (edmar@freescale.com) 3 ;; Contributed by Edmar Wienskoski (edmar@freescale.com)
4 ;; 4 ;;
5 ;; This file is part of GCC. 5 ;; This file is part of GCC.
6 ;; 6 ;;
7 ;; GCC is free software; you can redistribute it and/or modify it 7 ;; GCC is free software; you can redistribute it and/or modify it
68 (define_reservation "e500mc_su_stage0" 68 (define_reservation "e500mc_su_stage0"
69 "e500mc_su0_stage0|e500mc_su1_stage0+present_e500mc_su0_stage0") 69 "e500mc_su0_stage0|e500mc_su1_stage0+present_e500mc_su0_stage0")
70 70
71 ;; Simple SU insns. 71 ;; Simple SU insns.
72 (define_insn_reservation "e500mc_su" 1 72 (define_insn_reservation "e500mc_su" 1
73 (and (eq_attr "type" "integer,insert_word,insert_dword,cmp,compare,\ 73 (and (eq_attr "type" "integer,add,logical,insert,cmp,\
74 delayed_compare,var_delayed_compare,fast_compare,\ 74 shift,trap,cntlz,exts,isel")
75 shift,trap,var_shift_rotate,cntlz,exts,isel")
76 (eq_attr "cpu" "ppce500mc")) 75 (eq_attr "cpu" "ppce500mc"))
77 "e500mc_decode,e500mc_issue+e500mc_su_stage0+e500mc_retire") 76 "e500mc_decode,e500mc_issue+e500mc_su_stage0+e500mc_retire")
78 77
79 (define_insn_reservation "e500mc_two" 1 78 (define_insn_reservation "e500mc_two" 1
80 (and (eq_attr "type" "two") 79 (and (eq_attr "type" "two")
89 e500mc_issue+e500mc_su_stage0+e500mc_retire,\ 88 e500mc_issue+e500mc_su_stage0+e500mc_retire,\
90 e500mc_issue+e500mc_su_stage0+e500mc_retire") 89 e500mc_issue+e500mc_su_stage0+e500mc_retire")
91 90
92 ;; Multiply. 91 ;; Multiply.
93 (define_insn_reservation "e500mc_multiply" 4 92 (define_insn_reservation "e500mc_multiply" 4
94 (and (eq_attr "type" "imul,imul2,imul3,imul_compare") 93 (and (eq_attr "type" "mul")
95 (eq_attr "cpu" "ppce500mc")) 94 (eq_attr "cpu" "ppce500mc"))
96 "e500mc_decode,e500mc_issue+e500mc_mu_stage0,e500mc_mu_stage1,\ 95 "e500mc_decode,e500mc_issue+e500mc_mu_stage0,e500mc_mu_stage1,\
97 e500mc_mu_stage2,e500mc_mu_stage3+e500mc_retire") 96 e500mc_mu_stage2,e500mc_mu_stage3+e500mc_retire")
98 97
99 ;; Divide. We use the average latency time here. 98 ;; Divide. We use the average latency time here.
100 (define_insn_reservation "e500mc_divide" 14 99 (define_insn_reservation "e500mc_divide" 14
101 (and (eq_attr "type" "idiv") 100 (and (eq_attr "type" "div")
102 (eq_attr "cpu" "ppce500mc")) 101 (eq_attr "cpu" "ppce500mc"))
103 "e500mc_decode,e500mc_issue+e500mc_mu_stage0+e500mc_mu_div,\ 102 "e500mc_decode,e500mc_issue+e500mc_mu_stage0+e500mc_mu_div,\
104 e500mc_mu_div*13") 103 e500mc_mu_div*13")
105 104
106 ;; Branch. 105 ;; Branch.
131 (define_insn_reservation "e500mc_mtjmpr" 1 130 (define_insn_reservation "e500mc_mtjmpr" 1
132 (and (eq_attr "type" "mtjmpr,mfjmpr") 131 (and (eq_attr "type" "mtjmpr,mfjmpr")
133 (eq_attr "cpu" "ppce500mc")) 132 (eq_attr "cpu" "ppce500mc"))
134 "e500mc_decode,e500mc_issue+e500mc_su_stage0+e500mc_retire") 133 "e500mc_decode,e500mc_issue+e500mc_su_stage0+e500mc_retire")
135 134
136 ;; Brinc.
137 (define_insn_reservation "e500mc_brinc" 1
138 (and (eq_attr "type" "brinc")
139 (eq_attr "cpu" "ppce500mc"))
140 "e500mc_decode,e500mc_issue+e500mc_su_stage0+e500mc_retire")
141
142 ;; Loads. 135 ;; Loads.
143 (define_insn_reservation "e500mc_load" 3 136 (define_insn_reservation "e500mc_load" 3
144 (and (eq_attr "type" "load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u,\ 137 (and (eq_attr "type" "load,load_l,sync")
145 load_l,sync")
146 (eq_attr "cpu" "ppce500mc")) 138 (eq_attr "cpu" "ppce500mc"))
147 "e500mc_decode,e500mc_issue+e500mc_lsu,nothing,e500mc_retire") 139 "e500mc_decode,e500mc_issue+e500mc_lsu,nothing,e500mc_retire")
148 140
149 (define_insn_reservation "e500mc_fpload" 4 141 (define_insn_reservation "e500mc_fpload" 4
150 (and (eq_attr "type" "fpload,fpload_ux,fpload_u") 142 (and (eq_attr "type" "fpload")
151 (eq_attr "cpu" "ppce500mc")) 143 (eq_attr "cpu" "ppce500mc"))
152 "e500mc_decode,e500mc_issue+e500mc_lsu,nothing*2,e500mc_retire") 144 "e500mc_decode,e500mc_issue+e500mc_lsu,nothing*2,e500mc_retire")
153 145
154 ;; Stores. 146 ;; Stores.
155 (define_insn_reservation "e500mc_store" 3 147 (define_insn_reservation "e500mc_store" 3
156 (and (eq_attr "type" "store,store_ux,store_u,store_c") 148 (and (eq_attr "type" "store,store_c")
157 (eq_attr "cpu" "ppce500mc")) 149 (eq_attr "cpu" "ppce500mc"))
158 "e500mc_decode,e500mc_issue+e500mc_lsu,nothing,e500mc_retire") 150 "e500mc_decode,e500mc_issue+e500mc_lsu,nothing,e500mc_retire")
159 151
160 (define_insn_reservation "e500mc_fpstore" 3 152 (define_insn_reservation "e500mc_fpstore" 3
161 (and (eq_attr "type" "fpstore,fpstore_ux,fpstore_u") 153 (and (eq_attr "type" "fpstore")
162 (eq_attr "cpu" "ppce500mc")) 154 (eq_attr "cpu" "ppce500mc"))
163 "e500mc_decode,e500mc_issue+e500mc_lsu,nothing,e500mc_retire") 155 "e500mc_decode,e500mc_issue+e500mc_lsu,nothing,e500mc_retire")
164 156
165 ;; The following ignores the retire unit to avoid a large automata. 157 ;; The following ignores the retire unit to avoid a large automata.
166 158