--- a/gcc/config/rs6000/e500mc.md	Sun Aug 21 07:07:55 2011 +0900
+++ b/gcc/config/rs6000/e500mc.md	Fri Oct 27 22:46:09 2017 +0900
@@ -1,5 +1,5 @@
 ;; Pipeline description for Motorola PowerPC e500mc core.
-;;   Copyright (C) 2008 Free Software Foundation, Inc.
+;;   Copyright (C) 2008-2017 Free Software Foundation, Inc.
 ;;   Contributed by Edmar Wienskoski (edmar@freescale.com)
 ;;
 ;; This file is part of GCC.
@@ -70,9 +70,8 @@
 
 ;; Simple SU insns.
 (define_insn_reservation "e500mc_su" 1
-  (and (eq_attr "type" "integer,insert_word,insert_dword,cmp,compare,\
-                        delayed_compare,var_delayed_compare,fast_compare,\
-                        shift,trap,var_shift_rotate,cntlz,exts,isel")
+  (and (eq_attr "type" "integer,add,logical,insert,cmp,\
+                        shift,trap,cntlz,exts,isel")
        (eq_attr "cpu" "ppce500mc"))
   "e500mc_decode,e500mc_issue+e500mc_su_stage0+e500mc_retire")
 
@@ -91,14 +90,14 @@
 
 ;; Multiply.
 (define_insn_reservation "e500mc_multiply" 4
-  (and (eq_attr "type" "imul,imul2,imul3,imul_compare")
+  (and (eq_attr "type" "mul")
        (eq_attr "cpu" "ppce500mc"))
   "e500mc_decode,e500mc_issue+e500mc_mu_stage0,e500mc_mu_stage1,\
    e500mc_mu_stage2,e500mc_mu_stage3+e500mc_retire")
 
 ;; Divide. We use the average latency time here.
 (define_insn_reservation "e500mc_divide" 14
-  (and (eq_attr "type" "idiv")
+  (and (eq_attr "type" "div")
        (eq_attr "cpu" "ppce500mc"))
   "e500mc_decode,e500mc_issue+e500mc_mu_stage0+e500mc_mu_div,\
    e500mc_mu_div*13")
@@ -133,32 +132,25 @@
        (eq_attr "cpu" "ppce500mc"))
   "e500mc_decode,e500mc_issue+e500mc_su_stage0+e500mc_retire")
 
-;; Brinc.
-(define_insn_reservation "e500mc_brinc" 1
-  (and (eq_attr "type" "brinc")
-       (eq_attr "cpu" "ppce500mc"))
-  "e500mc_decode,e500mc_issue+e500mc_su_stage0+e500mc_retire")
-
 ;; Loads.
 (define_insn_reservation "e500mc_load" 3
-  (and (eq_attr "type" "load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u,\
-			load_l,sync")
+  (and (eq_attr "type" "load,load_l,sync")
        (eq_attr "cpu" "ppce500mc"))
   "e500mc_decode,e500mc_issue+e500mc_lsu,nothing,e500mc_retire")
 
 (define_insn_reservation "e500mc_fpload" 4
-  (and (eq_attr "type" "fpload,fpload_ux,fpload_u")
+  (and (eq_attr "type" "fpload")
        (eq_attr "cpu" "ppce500mc"))
   "e500mc_decode,e500mc_issue+e500mc_lsu,nothing*2,e500mc_retire")
 
 ;; Stores.
 (define_insn_reservation "e500mc_store" 3
-  (and (eq_attr "type" "store,store_ux,store_u,store_c")
+  (and (eq_attr "type" "store,store_c")
        (eq_attr "cpu" "ppce500mc"))
   "e500mc_decode,e500mc_issue+e500mc_lsu,nothing,e500mc_retire")
 
 (define_insn_reservation "e500mc_fpstore" 3
-  (and (eq_attr "type" "fpstore,fpstore_ux,fpstore_u")
+  (and (eq_attr "type" "fpstore")
        (eq_attr "cpu" "ppce500mc"))
   "e500mc_decode,e500mc_issue+e500mc_lsu,nothing,e500mc_retire")