Mercurial > hg > CbC > CbC_gcc
comparison gcc/config/msp430/msp430.h @ 145:1830386684a0
gcc-9.2.0
author | anatofuz |
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date | Thu, 13 Feb 2020 11:34:05 +0900 |
parents | 84e7813d76e9 |
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131:84e7813d76e9 | 145:1830386684a0 |
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1 /* GCC backend definitions for the TI MSP430 Processor | 1 /* GCC backend definitions for the TI MSP430 Processor |
2 Copyright (C) 2012-2018 Free Software Foundation, Inc. | 2 Copyright (C) 2012-2020 Free Software Foundation, Inc. |
3 Contributed by Red Hat. | 3 Contributed by Red Hat. |
4 | 4 |
5 This file is part of GCC. | 5 This file is part of GCC. |
6 | 6 |
7 GCC is free software; you can redistribute it and/or modify it | 7 GCC is free software; you can redistribute it and/or modify it |
24 /* True if the MSP430x extensions are enabled. */ | 24 /* True if the MSP430x extensions are enabled. */ |
25 #ifndef IN_LIBGCC2 | 25 #ifndef IN_LIBGCC2 |
26 extern bool msp430x; | 26 extern bool msp430x; |
27 #endif | 27 #endif |
28 | 28 |
29 #define TARGET_CPU_CPP_BUILTINS() \ | 29 #define TARGET_CPU_CPP_BUILTINS() \ |
30 do \ | 30 do \ |
31 { \ | 31 { \ |
32 builtin_define ("NO_TRAMPOLINES"); \ | 32 builtin_define ("NO_TRAMPOLINES"); \ |
33 builtin_define ("__MSP430__"); \ | 33 builtin_define ("__MSP430__"); \ |
34 builtin_define (msp430_mcu_name ()); \ | 34 builtin_define (msp430_mcu_name ()); \ |
35 if (msp430x) \ | 35 if (msp430x) \ |
36 { \ | 36 { \ |
37 builtin_define ("__MSP430X__"); \ | 37 builtin_define ("__MSP430X__"); \ |
39 if (TARGET_LARGE) \ | 39 if (TARGET_LARGE) \ |
40 builtin_define ("__MSP430X_LARGE__"); \ | 40 builtin_define ("__MSP430X_LARGE__"); \ |
41 } \ | 41 } \ |
42 else \ | 42 else \ |
43 builtin_assert ("cpu=MSP430"); \ | 43 builtin_assert ("cpu=MSP430"); \ |
44 } \ | 44 } \ |
45 while (0) | 45 while (0) |
46 | 46 |
47 /* For the "c" language where exceptions are implicitly disabled, use | |
48 crt*_no_eh.o unless -fexceptions is passed. For other languages, only use | |
49 crt*_no_eh.o if -fno-exceptions is explicitly passed. */ | |
47 #undef STARTFILE_SPEC | 50 #undef STARTFILE_SPEC |
48 #define STARTFILE_SPEC "%{pg:gcrt0.o%s}%{!pg:%{minrt:crt0-minrt.o%s}%{!minrt:crt0.o%s}} %{!minrt:crtbegin.o%s}" | 51 #define STARTFILE_SPEC "%{pg:gcrt0.o%s}" \ |
52 "%{!pg:%{minrt:crt0-minrt.o%s}%{!minrt:crt0.o%s}} " \ | |
53 "%{!minrt:%{,c:%{!fexceptions:crtbegin_no_eh.o%s; :crtbegin.o%s}; " \ | |
54 ":%{fno-exceptions:crtbegin_no_eh.o%s; :crtbegin.o%s}}}" | |
49 | 55 |
50 /* -lgcc is included because crtend.o needs __mspabi_func_epilog_1. */ | 56 /* -lgcc is included because crtend.o needs __mspabi_func_epilog_1. */ |
51 #undef ENDFILE_SPEC | 57 #undef ENDFILE_SPEC |
52 #define ENDFILE_SPEC "%{!minrt:crtend.o%s} %{minrt:crtn-minrt.o%s}%{!minrt:crtn.o%s} -lgcc" | 58 #define ENDFILE_SPEC \ |
59 "%{!minrt:%{,c:%{!fexceptions:crtend_no_eh.o%s; :crtend.o%s}; " \ | |
60 ":%{fno-exceptions:crtend_no_eh.o%s; :crtend.o%s}}} " \ | |
61 "%{minrt:%:if-exists(crtn-minrt.o%s)}%{!minrt:%:if-exists(crtn.o%s)} -lgcc" | |
53 | 62 |
54 #define ASM_SPEC "-mP " /* Enable polymorphic instructions. */ \ | 63 #define ASM_SPEC "-mP " /* Enable polymorphic instructions. */ \ |
55 "%{mcpu=*:-mcpu=%*}%{!mcpu=*:%{mmcu=*:-mmcu=%*}} " /* Pass the CPU type on to the assembler. */ \ | 64 "%{mcpu=*:-mcpu=%*} " /* Pass the CPU type on to the assembler. */ \ |
56 "%{mrelax=-mQ} " /* Pass the relax option on to the assembler. */ \ | 65 "%{mrelax=-mQ} " /* Pass the relax option on to the assembler. */ \ |
57 "%{mlarge:-ml} " /* Tell the assembler if we are building for the LARGE pointer model. */ \ | 66 /* Tell the assembler if we are building for the LARGE pointer model. */ \ |
58 "%{!msim:-md} %{msim:%{mlarge:-md}} " /* Copy data from ROM to RAM if necessary. */ \ | 67 "%{mlarge:-ml} " \ |
59 "%{msilicon-errata=*:-msilicon-errata=%*} " /* Pass on -msilicon-errata. */ \ | 68 /* Copy data from ROM to RAM if necessary. */ \ |
60 "%{msilicon-errata-warn=*:-msilicon-errata-warn=%*} " /* Pass on -msilicon-errata-warn. */ \ | 69 "%{!msim:-md} %{msim:%{mlarge:-md}} " \ |
61 "%{ffunction-sections:-gdwarf-sections} " /* If function sections are being created then create DWARF line number sections as well. */ \ | 70 "%{msilicon-errata=*:-msilicon-errata=%*} " \ |
62 "%{mdata-region=*:-mdata-region=%*} " /* Pass on -mdata-region. */ | 71 "%{msilicon-errata-warn=*:-msilicon-errata-warn=%*} " \ |
72 /* Create DWARF line number sections for -ffunction-sections. */ \ | |
73 "%{ffunction-sections:-gdwarf-sections} " \ | |
74 "%{mdata-region=*:-mdata-region=%*} " | |
63 | 75 |
64 /* Enable linker section garbage collection by default, unless we | 76 /* Enable linker section garbage collection by default, unless we |
65 are creating a relocatable binary (gc does not work) or debugging | 77 are creating a relocatable binary (gc does not work) or debugging |
66 is enabled (the GDB testsuite relies upon unused entities not being deleted). */ | 78 is enabled (the GDB testsuite relies upon unused entities not being |
79 deleted). */ | |
67 #define LINK_SPEC "%{mrelax:--relax} %{mlarge:%{!r:%{!g:--gc-sections}}} " \ | 80 #define LINK_SPEC "%{mrelax:--relax} %{mlarge:%{!r:%{!g:--gc-sections}}} " \ |
68 "%{mcode-region=*:--code-region=%*} %{mdata-region=*:--data-region=%*}" | 81 "%{mcode-region=*:--code-region=%:" \ |
82 "msp430_propagate_region_opt(%* %{muse-lower-region-prefix})} " \ | |
83 "%{mdata-region=*:--data-region=%:" \ | |
84 "msp430_propagate_region_opt(%* %{muse-lower-region-prefix})} " \ | |
85 "%:msp430_get_linker_devices_include_path() " \ | |
86 "%{mtiny-printf:--wrap puts --wrap printf} " | |
87 | |
88 #define DRIVER_SELF_SPECS \ | |
89 " %{!mlarge:%{mcode-region=*:%{mdata-region=*:%e-mcode-region and " \ | |
90 "-mdata-region require the large memory model (-mlarge)}}}" \ | |
91 " %{!mlarge:%{mcode-region=*:" \ | |
92 "%e-mcode-region requires the large memory model (-mlarge)}}" \ | |
93 " %{!mlarge:%{mdata-region=*:" \ | |
94 "%e-mdata-region requires the large memory model (-mlarge)}}" \ | |
95 " %{mno-warn-devices-csv:%:msp430_set_driver_var(msp430_warn_devices_csv 0)}"\ | |
96 " %{mdevices-csv-loc=*:%:msp430_set_driver_var(msp430_devices_csv_loc %*)}"\ | |
97 " %{I*:%:msp430_check_path_for_devices(%{I*:%*})}" \ | |
98 " %{L*:%:msp430_check_path_for_devices(%{L*:%*})}" \ | |
99 " %{!mcpu=*:%{mmcu=*:%:msp430_select_cpu(%{mmcu=*:%*})}}" | |
69 | 100 |
70 extern const char * msp430_select_hwmult_lib (int, const char **); | 101 extern const char * msp430_select_hwmult_lib (int, const char **); |
102 extern const char * msp430_select_cpu (int, const char **); | |
103 extern const char * msp430_set_driver_var (int, const char **); | |
104 extern const char * msp430_check_path_for_devices (int, const char **); | |
105 extern const char *msp430_propagate_region_opt (int, const char **); | |
106 extern const char *msp430_get_linker_devices_include_path (int, const char **); | |
107 | |
108 /* There must be a trailing comma after the last item, see gcc.c | |
109 "static_spec_functions". */ | |
71 # define EXTRA_SPEC_FUNCTIONS \ | 110 # define EXTRA_SPEC_FUNCTIONS \ |
72 { "msp430_hwmult_lib", msp430_select_hwmult_lib }, | 111 { "msp430_hwmult_lib", msp430_select_hwmult_lib }, \ |
112 { "msp430_select_cpu", msp430_select_cpu }, \ | |
113 { "msp430_set_driver_var", msp430_set_driver_var }, \ | |
114 { "msp430_check_path_for_devices", msp430_check_path_for_devices }, \ | |
115 { "msp430_propagate_region_opt", msp430_propagate_region_opt }, \ | |
116 { "msp430_get_linker_devices_include_path", \ | |
117 msp430_get_linker_devices_include_path }, | |
73 | 118 |
74 /* Specify the libraries to include on the linker command line. | 119 /* Specify the libraries to include on the linker command line. |
75 | 120 |
76 Selecting the hardware multiply library to use is quite complex. | 121 Selecting the hardware multiply library to use is quite complex. |
77 If the user has specified -mhwmult=FOO then the mapping is quite | 122 If the user has specified -mhwmult=FOO then the mapping is quite |
87 it to a hardware multiply library. This table (in device-msp430.c) | 132 it to a hardware multiply library. This table (in device-msp430.c) |
88 must be kept in sync with the same table in msp430.c. */ | 133 must be kept in sync with the same table in msp430.c. */ |
89 #undef LIB_SPEC | 134 #undef LIB_SPEC |
90 #define LIB_SPEC " \ | 135 #define LIB_SPEC " \ |
91 --start-group \ | 136 --start-group \ |
92 %{mhwmult=auto:%{mmcu=*:%:msp430_hwmult_lib(mcu %{mmcu=*:%*});:%:msp430_hwmult_lib(default)}; \ | 137 %{mhwmult=auto:%{mmcu=*:%:msp430_hwmult_lib(mcu %{mmcu=*:%*});\ |
138 :%:msp430_hwmult_lib(default)}; \ | |
93 mhwmult=*:%:msp430_hwmult_lib(hwmult %{mhwmult=*:%*}); \ | 139 mhwmult=*:%:msp430_hwmult_lib(hwmult %{mhwmult=*:%*}); \ |
94 mmcu=*:%:msp430_hwmult_lib(mcu %{mmcu=*:%*}); \ | 140 mmcu=*:%:msp430_hwmult_lib(mcu %{mmcu=*:%*}); \ |
95 :%:msp430_hwmult_lib(default)} \ | 141 :%:msp430_hwmult_lib(default)} \ |
96 -lc \ | 142 -lc \ |
97 -lgcc \ | 143 -lgcc \ |
157 #define POINTER_SIZE (TARGET_LARGE ? 20 : 16) | 203 #define POINTER_SIZE (TARGET_LARGE ? 20 : 16) |
158 /* This is just for .eh_frame, to match bfd. */ | 204 /* This is just for .eh_frame, to match bfd. */ |
159 #define PTR_SIZE (TARGET_LARGE ? 4 : 2) | 205 #define PTR_SIZE (TARGET_LARGE ? 4 : 2) |
160 #define POINTERS_EXTEND_UNSIGNED 1 | 206 #define POINTERS_EXTEND_UNSIGNED 1 |
161 | 207 |
208 /* TARGET_VTABLE_ENTRY_ALIGN defaults to POINTER_SIZE, which is 20 for | |
209 TARGET_LARGE. Pointer alignment is always 16 for MSP430, so set explicitly | |
210 here. */ | |
211 #define TARGET_VTABLE_ENTRY_ALIGN 16 | |
212 | |
162 #define ADDR_SPACE_NEAR 1 | 213 #define ADDR_SPACE_NEAR 1 |
163 #define ADDR_SPACE_FAR 2 | 214 #define ADDR_SPACE_FAR 2 |
164 | 215 |
165 #define REGISTER_TARGET_PRAGMAS() msp430_register_pragmas() | 216 #define REGISTER_TARGET_PRAGMAS() msp430_register_pragmas() |
166 | 217 |
178 #endif | 229 #endif |
179 | 230 |
180 /* Layout of Source Language Data Types */ | 231 /* Layout of Source Language Data Types */ |
181 | 232 |
182 #undef SIZE_TYPE | 233 #undef SIZE_TYPE |
183 #define SIZE_TYPE (TARGET_LARGE ? "__int20 unsigned" : "unsigned int") | 234 #define SIZE_TYPE (TARGET_LARGE \ |
235 ? "__int20__ unsigned" \ | |
236 : "unsigned int") | |
184 #undef PTRDIFF_TYPE | 237 #undef PTRDIFF_TYPE |
185 #define PTRDIFF_TYPE (TARGET_LARGE ? "__int20" : "int") | 238 #define PTRDIFF_TYPE (TARGET_LARGE ? "__int20__" : "int") |
186 #undef WCHAR_TYPE | 239 #undef WCHAR_TYPE |
187 #define WCHAR_TYPE "long int" | 240 #define WCHAR_TYPE "long int" |
188 #undef WCHAR_TYPE_SIZE | 241 #undef WCHAR_TYPE_SIZE |
189 #define WCHAR_TYPE_SIZE BITS_PER_WORD | 242 #define WCHAR_TYPE_SIZE BITS_PER_WORD |
190 #define FUNCTION_MODE HImode | 243 #define FUNCTION_MODE HImode |
213 #define REGISTER_NAMES \ | 266 #define REGISTER_NAMES \ |
214 { \ | 267 { \ |
215 "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", \ | 268 "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", \ |
216 "R8", "R9", "R10", "R11", "R12", "R13", "R14", "R15", \ | 269 "R8", "R9", "R10", "R11", "R12", "R13", "R14", "R15", \ |
217 "argptr" \ | 270 "argptr" \ |
271 } | |
272 | |
273 /* Allow lowercase "r" to be used in register names instead of upper | |
274 case "R". */ | |
275 #define ADDITIONAL_REGISTER_NAMES \ | |
276 { \ | |
277 { "r0", 0 }, \ | |
278 { "r1", 1 }, \ | |
279 { "r2", 2 }, \ | |
280 { "r3", 3 }, \ | |
281 { "r4", 4 }, \ | |
282 { "r5", 5 }, \ | |
283 { "r6", 6 }, \ | |
284 { "r7", 7 }, \ | |
285 { "r8", 8 }, \ | |
286 { "r9", 9 }, \ | |
287 { "r10", 10 }, \ | |
288 { "r11", 11 }, \ | |
289 { "r12", 12 }, \ | |
290 { "r13", 13 }, \ | |
291 { "r14", 14 }, \ | |
292 { "r15", 15 } \ | |
218 } | 293 } |
219 | 294 |
220 enum reg_class | 295 enum reg_class |
221 { | 296 { |
222 NO_REGS, | 297 NO_REGS, |
239 #define REG_CLASS_CONTENTS \ | 314 #define REG_CLASS_CONTENTS \ |
240 { \ | 315 { \ |
241 0x00000000, \ | 316 0x00000000, \ |
242 0x00001000, \ | 317 0x00001000, \ |
243 0x00002000, \ | 318 0x00002000, \ |
244 0x0000fff2, \ | 319 0x0000fff3, \ |
245 0x0001ffff \ | 320 0x0001ffff \ |
246 } | 321 } |
247 | 322 |
323 /* GENERAL_REGS just means that the "g" and "r" constraints can use these | |
324 registers. | |
325 Even though R0 (PC) and R1 (SP) are not "general" in that they can be used | |
326 for any purpose by the register allocator, they are general in that they can | |
327 be used by any instruction in any addressing mode. */ | |
248 #define GENERAL_REGS GEN_REGS | 328 #define GENERAL_REGS GEN_REGS |
249 #define BASE_REG_CLASS GEN_REGS | 329 #define BASE_REG_CLASS GEN_REGS |
250 #define INDEX_REG_CLASS GEN_REGS | 330 #define INDEX_REG_CLASS GEN_REGS |
251 #define N_REG_CLASSES (int) LIM_REG_CLASSES | 331 #define N_REG_CLASSES (int) LIM_REG_CLASSES |
252 | 332 |
253 #define PC_REGNUM 0 | 333 #define PC_REGNUM 0 |
254 #define STACK_POINTER_REGNUM 1 | 334 #define STACK_POINTER_REGNUM 1 |
255 #define CC_REGNUM 2 | 335 #define CC_REGNUM 2 |
256 #define FRAME_POINTER_REGNUM 4 /* not usually used, call preserved */ | 336 #define FRAME_POINTER_REGNUM 4 /* not usually used, call preserved */ |
257 #define ARG_POINTER_REGNUM 16 | 337 #define ARG_POINTER_REGNUM 16 |
258 #define STATIC_CHAIN_REGNUM 5 /* FIXME */ | 338 #define STATIC_CHAIN_REGNUM 5 /* FIXME */ |
259 | 339 |
260 #define FIRST_PSEUDO_REGISTER 17 | 340 #define FIRST_PSEUDO_REGISTER 17 |
261 | 341 |
262 #define REGNO_REG_CLASS(REGNO) ((REGNO) < 17 \ | 342 #define REGNO_REG_CLASS(REGNO) (REGNO != 2 \ |
343 && REGNO != 3 \ | |
344 && REGNO < 17 \ | |
263 ? GEN_REGS : NO_REGS) | 345 ? GEN_REGS : NO_REGS) |
264 | 346 |
265 #define TRAMPOLINE_SIZE 4 /* FIXME */ | 347 #define TRAMPOLINE_SIZE 4 /* FIXME */ |
266 #define TRAMPOLINE_ALIGNMENT 16 /* FIXME */ | 348 #define TRAMPOLINE_ALIGNMENT 16 /* FIXME */ |
267 | 349 |
336 | 418 |
337 #define EH_RETURN_DATA_REGNO(N) \ | 419 #define EH_RETURN_DATA_REGNO(N) \ |
338 (((N) < 3) ? ((N) + 12) : INVALID_REGNUM) | 420 (((N) < 3) ? ((N) + 12) : INVALID_REGNUM) |
339 | 421 |
340 #define EH_RETURN_HANDLER_RTX \ | 422 #define EH_RETURN_HANDLER_RTX \ |
341 gen_rtx_MEM(Pmode, gen_rtx_PLUS (Pmode, gen_rtx_REG(Pmode, SP_REGNO), gen_rtx_REG (Pmode, 15))) | 423 gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, gen_rtx_REG (Pmode, SP_REGNO), \ |
424 gen_rtx_REG (Pmode, 15))) | |
342 | 425 |
343 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 15) | 426 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 15) |
344 | 427 |
345 #define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) DW_EH_PE_udata4 | 428 #define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) DW_EH_PE_udata4 |
346 | 429 |
380 | 463 |
381 #define ASM_OUTPUT_ALIGN(STREAM, LOG) \ | 464 #define ASM_OUTPUT_ALIGN(STREAM, LOG) \ |
382 do \ | 465 do \ |
383 { \ | 466 { \ |
384 if ((LOG) == 0) \ | 467 if ((LOG) == 0) \ |
385 break; \ | 468 break; \ |
386 fprintf (STREAM, "\t.balign %d\n", 1 << (LOG)); \ | 469 fprintf (STREAM, "\t.balign %d\n", 1 << (LOG)); \ |
387 } \ | 470 } \ |
388 while (0) | 471 while (0) |
389 | 472 |
390 #define JUMP_TABLES_IN_TEXT_SECTION 1 | 473 #define JUMP_TABLES_IN_TEXT_SECTION 1 |
400 #define DWARF2_ASM_LINE_DEBUG_INFO 1 | 483 #define DWARF2_ASM_LINE_DEBUG_INFO 1 |
401 | 484 |
402 /* Prevent reload (and others) from choosing HImode stack slots | 485 /* Prevent reload (and others) from choosing HImode stack slots |
403 when spilling hard registers when they may contain PSImode values. */ | 486 when spilling hard registers when they may contain PSImode values. */ |
404 #define HARD_REGNO_CALLER_SAVE_MODE(REGNO,NREGS,MODE) \ | 487 #define HARD_REGNO_CALLER_SAVE_MODE(REGNO,NREGS,MODE) \ |
405 ((TARGET_LARGE && ((NREGS) <= 2)) ? PSImode : choose_hard_reg_mode ((REGNO), (NREGS), false)) | 488 ((TARGET_LARGE && ((NREGS) <= 2)) ? PSImode \ |
489 : choose_hard_reg_mode ((REGNO), (NREGS), NULL)) | |
406 | 490 |
407 #define ACCUMULATE_OUTGOING_ARGS 1 | 491 #define ACCUMULATE_OUTGOING_ARGS 1 |
492 | |
493 #define HAVE_POST_INCREMENT 1 | |
494 | |
495 /* This (unsurprisingly) improves code size in the vast majority of cases, we | |
496 want to prevent any instructions using a "store post increment" from being | |
497 generated. These will have to later be reloaded since msp430 does not | |
498 support post inc for the destination operand. */ | |
499 #define USE_STORE_POST_INCREMENT(MODE) 0 | |
500 | |
501 /* Many other targets set USE_LOAD_POST_INCREMENT to 0. For msp430-elf | |
502 the benefit of disabling it is not clear. When looking at code size, on | |
503 average, there is a slight advantage to leaving it enabled. */ | |
408 | 504 |
409 #undef ASM_DECLARE_FUNCTION_NAME | 505 #undef ASM_DECLARE_FUNCTION_NAME |
410 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \ | 506 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \ |
411 msp430_start_function ((FILE), (NAME), (DECL)) | 507 msp430_start_function ((FILE), (NAME), (DECL)) |
412 | 508 |
413 #define TARGET_HAS_NO_HW_DIVIDE (! TARGET_HWMULT) | 509 #define TARGET_HAS_NO_HW_DIVIDE (! TARGET_HWMULT) |
414 | 510 |
511 void msp430_register_pre_includes (const char *sysroot ATTRIBUTE_UNUSED, | |
512 const char *iprefix ATTRIBUTE_UNUSED, | |
513 int stdinc ATTRIBUTE_UNUSED); | |
514 #undef TARGET_EXTRA_PRE_INCLUDES | |
515 #define TARGET_EXTRA_PRE_INCLUDES msp430_register_pre_includes | |
516 | |
415 #undef USE_SELECT_SECTION_FOR_FUNCTIONS | 517 #undef USE_SELECT_SECTION_FOR_FUNCTIONS |
416 #define USE_SELECT_SECTION_FOR_FUNCTIONS 1 | 518 #define USE_SELECT_SECTION_FOR_FUNCTIONS 1 |
417 | 519 |
418 #define ASM_OUTPUT_ALIGNED_DECL_COMMON(FILE, DECL, NAME, SIZE, ALIGN) \ | 520 #define ASM_OUTPUT_ALIGNED_DECL_COMMON(FILE, DECL, NAME, SIZE, ALIGN) \ |
419 msp430_output_aligned_decl_common ((FILE), (DECL), (NAME), (SIZE), (ALIGN)) | 521 msp430_output_aligned_decl_common ((FILE), (DECL), (NAME), (SIZE), (ALIGN)) |
522 | |
523 #define SYMBOL_FLAG_LOW_MEM (SYMBOL_FLAG_MACH_DEP << 0) |