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111
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1 /* GCC backend definitions for the TI MSP430 Processor
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145
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2 Copyright (C) 2012-2020 Free Software Foundation, Inc.
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111
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3 Contributed by Red Hat.
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4
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5 This file is part of GCC.
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6
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7 GCC is free software; you can redistribute it and/or modify it
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8 under the terms of the GNU General Public License as published
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9 by the Free Software Foundation; either version 3, or (at your
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10 option) any later version.
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11
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12 GCC is distributed in the hope that it will be useful, but WITHOUT
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13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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15 License for more details.
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16
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17 You should have received a copy of the GNU General Public License
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18 along with GCC; see the file COPYING3. If not see
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19 <http://www.gnu.org/licenses/>. */
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20
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21
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22 /* Run-time Target Specification */
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23
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24 /* True if the MSP430x extensions are enabled. */
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25 #ifndef IN_LIBGCC2
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26 extern bool msp430x;
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27 #endif
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28
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29 #define TARGET_CPU_CPP_BUILTINS() \
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30 do \
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31 { \
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32 builtin_define ("NO_TRAMPOLINES"); \
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33 builtin_define ("__MSP430__"); \
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34 builtin_define (msp430_mcu_name ()); \
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35 if (msp430x) \
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36 { \
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37 builtin_define ("__MSP430X__"); \
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38 builtin_assert ("cpu=MSP430X"); \
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39 if (TARGET_LARGE) \
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40 builtin_define ("__MSP430X_LARGE__"); \
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41 } \
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42 else \
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43 builtin_assert ("cpu=MSP430"); \
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145
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44 } \
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45 while (0)
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46
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47 /* For the "c" language where exceptions are implicitly disabled, use
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48 crt*_no_eh.o unless -fexceptions is passed. For other languages, only use
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49 crt*_no_eh.o if -fno-exceptions is explicitly passed. */
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50 #undef STARTFILE_SPEC
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145
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51 #define STARTFILE_SPEC "%{pg:gcrt0.o%s}" \
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52 "%{!pg:%{minrt:crt0-minrt.o%s}%{!minrt:crt0.o%s}} " \
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53 "%{!minrt:%{,c:%{!fexceptions:crtbegin_no_eh.o%s; :crtbegin.o%s}; " \
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54 ":%{fno-exceptions:crtbegin_no_eh.o%s; :crtbegin.o%s}}}"
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55
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56 /* -lgcc is included because crtend.o needs __mspabi_func_epilog_1. */
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57 #undef ENDFILE_SPEC
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145
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58 #define ENDFILE_SPEC \
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59 "%{!minrt:%{,c:%{!fexceptions:crtend_no_eh.o%s; :crtend.o%s}; " \
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60 ":%{fno-exceptions:crtend_no_eh.o%s; :crtend.o%s}}} " \
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61 "%{minrt:%:if-exists(crtn-minrt.o%s)}%{!minrt:%:if-exists(crtn.o%s)} -lgcc"
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62
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63 #define ASM_SPEC "-mP " /* Enable polymorphic instructions. */ \
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145
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64 "%{mcpu=*:-mcpu=%*} " /* Pass the CPU type on to the assembler. */ \
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111
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65 "%{mrelax=-mQ} " /* Pass the relax option on to the assembler. */ \
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145
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66 /* Tell the assembler if we are building for the LARGE pointer model. */ \
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67 "%{mlarge:-ml} " \
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68 /* Copy data from ROM to RAM if necessary. */ \
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69 "%{!msim:-md} %{msim:%{mlarge:-md}} " \
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70 "%{msilicon-errata=*:-msilicon-errata=%*} " \
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71 "%{msilicon-errata-warn=*:-msilicon-errata-warn=%*} " \
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72 /* Create DWARF line number sections for -ffunction-sections. */ \
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73 "%{ffunction-sections:-gdwarf-sections} " \
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74 "%{mdata-region=*:-mdata-region=%*} "
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75
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76 /* Enable linker section garbage collection by default, unless we
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77 are creating a relocatable binary (gc does not work) or debugging
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78 is enabled (the GDB testsuite relies upon unused entities not being
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79 deleted). */
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80 #define LINK_SPEC "%{mrelax:--relax} %{mlarge:%{!r:%{!g:--gc-sections}}} " \
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145
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81 "%{mcode-region=*:--code-region=%:" \
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82 "msp430_propagate_region_opt(%* %{muse-lower-region-prefix})} " \
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83 "%{mdata-region=*:--data-region=%:" \
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84 "msp430_propagate_region_opt(%* %{muse-lower-region-prefix})} " \
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85 "%:msp430_get_linker_devices_include_path() " \
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86 "%{mtiny-printf:--wrap puts --wrap printf} "
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87
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88 #define DRIVER_SELF_SPECS \
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89 " %{!mlarge:%{mcode-region=*:%{mdata-region=*:%e-mcode-region and " \
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90 "-mdata-region require the large memory model (-mlarge)}}}" \
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91 " %{!mlarge:%{mcode-region=*:" \
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92 "%e-mcode-region requires the large memory model (-mlarge)}}" \
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93 " %{!mlarge:%{mdata-region=*:" \
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94 "%e-mdata-region requires the large memory model (-mlarge)}}" \
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95 " %{mno-warn-devices-csv:%:msp430_set_driver_var(msp430_warn_devices_csv 0)}"\
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96 " %{mdevices-csv-loc=*:%:msp430_set_driver_var(msp430_devices_csv_loc %*)}"\
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97 " %{I*:%:msp430_check_path_for_devices(%{I*:%*})}" \
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98 " %{L*:%:msp430_check_path_for_devices(%{L*:%*})}" \
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99 " %{!mcpu=*:%{mmcu=*:%:msp430_select_cpu(%{mmcu=*:%*})}}"
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100
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101 extern const char * msp430_select_hwmult_lib (int, const char **);
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145
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102 extern const char * msp430_select_cpu (int, const char **);
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103 extern const char * msp430_set_driver_var (int, const char **);
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104 extern const char * msp430_check_path_for_devices (int, const char **);
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105 extern const char *msp430_propagate_region_opt (int, const char **);
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106 extern const char *msp430_get_linker_devices_include_path (int, const char **);
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107
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108 /* There must be a trailing comma after the last item, see gcc.c
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109 "static_spec_functions". */
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111
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110 # define EXTRA_SPEC_FUNCTIONS \
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145
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111 { "msp430_hwmult_lib", msp430_select_hwmult_lib }, \
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112 { "msp430_select_cpu", msp430_select_cpu }, \
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113 { "msp430_set_driver_var", msp430_set_driver_var }, \
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114 { "msp430_check_path_for_devices", msp430_check_path_for_devices }, \
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115 { "msp430_propagate_region_opt", msp430_propagate_region_opt }, \
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116 { "msp430_get_linker_devices_include_path", \
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117 msp430_get_linker_devices_include_path },
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111
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118
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119 /* Specify the libraries to include on the linker command line.
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120
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121 Selecting the hardware multiply library to use is quite complex.
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122 If the user has specified -mhwmult=FOO then the mapping is quite
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123 easy (and could be handled here in the SPEC string), unless FOO
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124 is set to AUTO. In this case the -mmcu= option must be consulted
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125 instead. If the -mhwmult= option is not specified then the -mmcu=
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126 option must then be examined. If neither -mhwmult= nor -mmcu= are
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127 specified then a default hardware multiply library is used.
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128
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129 Examining the -mmcu=FOO option is difficult, and it is so this
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130 reason that a spec function is used. There are so many possible
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131 values of FOO that a table is used to look up the name and map
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132 it to a hardware multiply library. This table (in device-msp430.c)
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133 must be kept in sync with the same table in msp430.c. */
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134 #undef LIB_SPEC
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135 #define LIB_SPEC " \
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136 --start-group \
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137 %{mhwmult=auto:%{mmcu=*:%:msp430_hwmult_lib(mcu %{mmcu=*:%*});\
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138 :%:msp430_hwmult_lib(default)}; \
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111
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139 mhwmult=*:%:msp430_hwmult_lib(hwmult %{mhwmult=*:%*}); \
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140 mmcu=*:%:msp430_hwmult_lib(mcu %{mmcu=*:%*}); \
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141 :%:msp430_hwmult_lib(default)} \
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142 -lc \
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143 -lgcc \
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144 -lcrt \
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145 %{msim:-lsim} \
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146 %{!msim:-lnosys} \
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147 --end-group \
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148 %{!T*:%{!msim:%{mmcu=*:--script=%*.ld}}} \
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149 %{!T*:%{msim:%{mlarge:%Tmsp430xl-sim.ld}%{!mlarge:%Tmsp430-sim.ld}}} \
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150 "
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151
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152 /* Storage Layout */
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153
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154 #define BITS_BIG_ENDIAN 0
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155 #define BYTES_BIG_ENDIAN 0
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156 #define WORDS_BIG_ENDIAN 0
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157
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158
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159 #ifdef IN_LIBGCC2
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160 /* This is to get correct SI and DI modes in libgcc2.c (32 and 64 bits). */
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161 #define UNITS_PER_WORD 4
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162 /* We have a problem with libgcc2. It only defines two versions of
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163 each function, one for "int" and one for "long long". Ie it assumes
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164 that "sizeof (int) == sizeof (long)". For the MSP430 this is not true
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165 and we need a third set of functions. We explicitly define
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166 LIBGCC2_UNITS_PER_WORD here so that it is clear that we are expecting
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167 to get the SI and DI versions from the libgcc2.c sources, and we
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168 provide our own set of HI functions, which is why this
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169 definition is surrounded by #ifndef..#endif. */
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170 #ifndef LIBGCC2_UNITS_PER_WORD
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171 #define LIBGCC2_UNITS_PER_WORD 4
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172 #endif
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173 #else
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174 /* Actual width of a word, in units (bytes). */
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175 #define UNITS_PER_WORD 2
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176 #endif
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177
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178 #define SHORT_TYPE_SIZE 16
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179 #define INT_TYPE_SIZE 16
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180 #define LONG_TYPE_SIZE 32
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181 #define LONG_LONG_TYPE_SIZE 64
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182
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183 #define FLOAT_TYPE_SIZE 32
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184 #define DOUBLE_TYPE_SIZE 64
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185 #define LONG_DOUBLE_TYPE_SIZE 64 /*DOUBLE_TYPE_SIZE*/
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186
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187 #define DEFAULT_SIGNED_CHAR 0
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188
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189 #define STRICT_ALIGNMENT 1
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190 #define FUNCTION_BOUNDARY 16
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191 #define BIGGEST_ALIGNMENT 16
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192 #define STACK_BOUNDARY 16
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193 #define PARM_BOUNDARY 8
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194 #define PCC_BITFIELD_TYPE_MATTERS 1
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195
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196 #define STACK_GROWS_DOWNWARD 1
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197 #define FRAME_GROWS_DOWNWARD 1
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198 #define FIRST_PARM_OFFSET(FNDECL) 0
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199
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200 #define MAX_REGS_PER_ADDRESS 1
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201
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202 #define Pmode (TARGET_LARGE ? PSImode : HImode)
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203 #define POINTER_SIZE (TARGET_LARGE ? 20 : 16)
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204 /* This is just for .eh_frame, to match bfd. */
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205 #define PTR_SIZE (TARGET_LARGE ? 4 : 2)
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206 #define POINTERS_EXTEND_UNSIGNED 1
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207
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208 /* TARGET_VTABLE_ENTRY_ALIGN defaults to POINTER_SIZE, which is 20 for
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209 TARGET_LARGE. Pointer alignment is always 16 for MSP430, so set explicitly
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210 here. */
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211 #define TARGET_VTABLE_ENTRY_ALIGN 16
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212
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111
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213 #define ADDR_SPACE_NEAR 1
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214 #define ADDR_SPACE_FAR 2
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215
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216 #define REGISTER_TARGET_PRAGMAS() msp430_register_pragmas()
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217
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218 #if 1 /* XXX */
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219 /* Define this macro if it is advisable to hold scalars in registers
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220 in a wider mode than that declared by the program. In such cases,
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221 the value is constrained to be within the bounds of the declared
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222 type, but kept valid in the wider mode. The signedness of the
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223 extension may differ from that of the type. */
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224
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225 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
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226 if (GET_MODE_CLASS (MODE) == MODE_INT \
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227 && GET_MODE_SIZE (MODE) < 2) \
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228 (MODE) = HImode;
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229 #endif
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230
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231 /* Layout of Source Language Data Types */
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232
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233 #undef SIZE_TYPE
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234 #define SIZE_TYPE (TARGET_LARGE \
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235 ? "__int20__ unsigned" \
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236 : "unsigned int")
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111
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237 #undef PTRDIFF_TYPE
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145
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238 #define PTRDIFF_TYPE (TARGET_LARGE ? "__int20__" : "int")
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111
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239 #undef WCHAR_TYPE
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240 #define WCHAR_TYPE "long int"
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241 #undef WCHAR_TYPE_SIZE
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242 #define WCHAR_TYPE_SIZE BITS_PER_WORD
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243 #define FUNCTION_MODE HImode
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244 #define CASE_VECTOR_MODE Pmode
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245 #define HAS_LONG_COND_BRANCH 0
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246 #define HAS_LONG_UNCOND_BRANCH 0
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247
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248 #define LOAD_EXTEND_OP(M) ZERO_EXTEND
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249 #define WORD_REGISTER_OPERATIONS 1
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250
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251 #define MOVE_MAX 8
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252
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253 #define INCOMING_RETURN_ADDR_RTX \
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254 msp430_incoming_return_addr_rtx ()
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255
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256 #define RETURN_ADDR_RTX(COUNT, FA) \
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257 msp430_return_addr_rtx (COUNT)
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258
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259 #define SLOW_BYTE_ACCESS 0
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260
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261
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262 /* Register Usage */
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263
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264 /* gas doesn't recognize PC (R0), SP (R1), and SR (R2) as register
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265 names. */
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266 #define REGISTER_NAMES \
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267 { \
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268 "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", \
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269 "R8", "R9", "R10", "R11", "R12", "R13", "R14", "R15", \
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270 "argptr" \
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271 }
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272
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145
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273 /* Allow lowercase "r" to be used in register names instead of upper
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274 case "R". */
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275 #define ADDITIONAL_REGISTER_NAMES \
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276 { \
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277 { "r0", 0 }, \
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278 { "r1", 1 }, \
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279 { "r2", 2 }, \
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280 { "r3", 3 }, \
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281 { "r4", 4 }, \
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282 { "r5", 5 }, \
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283 { "r6", 6 }, \
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284 { "r7", 7 }, \
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285 { "r8", 8 }, \
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286 { "r9", 9 }, \
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287 { "r10", 10 }, \
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288 { "r11", 11 }, \
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289 { "r12", 12 }, \
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290 { "r13", 13 }, \
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291 { "r14", 14 }, \
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292 { "r15", 15 } \
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293 }
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294
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111
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295 enum reg_class
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296 {
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297 NO_REGS,
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298 R12_REGS,
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299 R13_REGS,
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300 GEN_REGS,
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301 ALL_REGS,
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302 LIM_REG_CLASSES
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303 };
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304
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305 #define REG_CLASS_NAMES \
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306 { \
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307 "NO_REGS", \
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308 "R12_REGS", \
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309 "R13_REGS", \
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310 "GEN_REGS", \
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311 "ALL_REGS" \
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312 }
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313
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314 #define REG_CLASS_CONTENTS \
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315 { \
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316 0x00000000, \
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317 0x00001000, \
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318 0x00002000, \
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145
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319 0x0000fff3, \
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111
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320 0x0001ffff \
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321 }
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322
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145
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323 /* GENERAL_REGS just means that the "g" and "r" constraints can use these
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324 registers.
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325 Even though R0 (PC) and R1 (SP) are not "general" in that they can be used
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326 for any purpose by the register allocator, they are general in that they can
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327 be used by any instruction in any addressing mode. */
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111
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328 #define GENERAL_REGS GEN_REGS
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329 #define BASE_REG_CLASS GEN_REGS
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330 #define INDEX_REG_CLASS GEN_REGS
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331 #define N_REG_CLASSES (int) LIM_REG_CLASSES
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332
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145
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333 #define PC_REGNUM 0
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334 #define STACK_POINTER_REGNUM 1
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335 #define CC_REGNUM 2
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111
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336 #define FRAME_POINTER_REGNUM 4 /* not usually used, call preserved */
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337 #define ARG_POINTER_REGNUM 16
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338 #define STATIC_CHAIN_REGNUM 5 /* FIXME */
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339
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340 #define FIRST_PSEUDO_REGISTER 17
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341
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145
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342 #define REGNO_REG_CLASS(REGNO) (REGNO != 2 \
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343 && REGNO != 3 \
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344 && REGNO < 17 \
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111
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345 ? GEN_REGS : NO_REGS)
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346
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347 #define TRAMPOLINE_SIZE 4 /* FIXME */
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348 #define TRAMPOLINE_ALIGNMENT 16 /* FIXME */
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349
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350 #define ELIMINABLE_REGS \
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351 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
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352 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM }, \
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353 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }}
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354
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355 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
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356 (OFFSET) = msp430_initial_elimination_offset ((FROM), (TO))
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357
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358
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359 #define FUNCTION_ARG_REGNO_P(N) ((N) >= 8 && (N) < ARG_POINTER_REGNUM)
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360 #define DEFAULT_PCC_STRUCT_RETURN 0
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361
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362 /* 1 == register can't be used by gcc, in general
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363 0 == register can be used by gcc, in general */
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364 #define FIXED_REGISTERS \
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365 { \
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366 1,0,1,1, 0,0,0,0, \
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367 0,0,0,0, 0,0,0,0, \
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368 1, \
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369 }
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370
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371 /* 1 == value changes across function calls
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372 0 == value is the same after a call */
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373 /* R4 through R10 are callee-saved */
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374 #define CALL_USED_REGISTERS \
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375 { \
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376 1,0,1,1, 0,0,0,0, \
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377 0,0,0,1, 1,1,1,1, \
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378 1, \
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379 }
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380
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381 #define REG_ALLOC_ORDER \
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382 { 12, 13, 14, 15, 10, 9, 8, 7, 6, 5, 4, 11, 0, 1, 2, 3, 16 }
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383 /* { 11, 15, 14, 13, 12, 10, 9, 8, 7, 6, 5, 4, 0, 1, 2, 3, 16 }*/
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384
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385 #define REGNO_OK_FOR_BASE_P(regno) 1
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386 #define REGNO_OK_FOR_INDEX_P(regno) 1
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387
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388
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389
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390 typedef struct
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391 {
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392 /* These two are the current argument status. */
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393 char reg_used[4];
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394 #define CA_FIRST_REG 12
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395 char can_split;
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396 /* These two are temporaries used internally. */
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397 char start_reg;
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398 char reg_count;
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399 char mem_count;
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400 char special_p;
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401 } CUMULATIVE_ARGS;
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402
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403 #define INIT_CUMULATIVE_ARGS(CA, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
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404 msp430_init_cumulative_args (&CA, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS)
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405
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406
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407 /* FIXME */
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408 #define NO_PROFILE_COUNTERS 1
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409 #define PROFILE_BEFORE_PROLOGUE 1
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410
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411 #define FUNCTION_PROFILER(FILE, LABELNO) \
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412 fprintf (FILE, "\tcall\t__mcount\n");
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413
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414 /* Exception Handling */
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415
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416 /* R12,R13,R14 - EH data
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417 R15 - stack adjustment */
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418
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419 #define EH_RETURN_DATA_REGNO(N) \
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420 (((N) < 3) ? ((N) + 12) : INVALID_REGNUM)
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421
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422 #define EH_RETURN_HANDLER_RTX \
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145
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423 gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, gen_rtx_REG (Pmode, SP_REGNO), \
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424 gen_rtx_REG (Pmode, 15)))
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111
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425
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426 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 15)
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427
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428 #define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) DW_EH_PE_udata4
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429
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430
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431 /* Stack Layout and Calling Conventions */
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432
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433
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434 /* Addressing Modes */
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435
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436
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437
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438 #define TEXT_SECTION_ASM_OP ".text"
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439 #define DATA_SECTION_ASM_OP ".data"
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440 #define BSS_SECTION_ASM_OP "\t.section .bss"
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441
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442 #define ASM_COMMENT_START " ;"
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443 #define ASM_APP_ON ""
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444 #define ASM_APP_OFF ""
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445 #define LOCAL_LABEL_PREFIX ".L"
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446 #undef USER_LABEL_PREFIX
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447 #define USER_LABEL_PREFIX ""
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448
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449 #define GLOBAL_ASM_OP "\t.global\t"
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450
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451 #define ASM_OUTPUT_LABELREF(FILE, SYM) msp430_output_labelref ((FILE), (SYM))
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452
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453 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
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454 fprintf (FILE, "\t.long .L%d\n", VALUE)
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455
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456 /* This is how to output an element of a case-vector that is relative.
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457 Note: The local label referenced by the "3b" below is emitted by
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458 the tablejump insn. */
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459
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460 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
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461 fprintf (FILE, "\t.long .L%d - 1b\n", VALUE)
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462
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463
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464 #define ASM_OUTPUT_ALIGN(STREAM, LOG) \
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465 do \
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466 { \
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467 if ((LOG) == 0) \
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145
|
468 break; \
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111
|
469 fprintf (STREAM, "\t.balign %d\n", 1 << (LOG)); \
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470 } \
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471 while (0)
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472
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473 #define JUMP_TABLES_IN_TEXT_SECTION 1
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474
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475 #undef DWARF2_ADDR_SIZE
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476 #define DWARF2_ADDR_SIZE 4
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477
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478 #define INCOMING_FRAME_SP_OFFSET (TARGET_LARGE ? 4 : 2)
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479
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480 #undef PREFERRED_DEBUGGING_TYPE
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481 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
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482
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483 #define DWARF2_ASM_LINE_DEBUG_INFO 1
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484
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485 /* Prevent reload (and others) from choosing HImode stack slots
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486 when spilling hard registers when they may contain PSImode values. */
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487 #define HARD_REGNO_CALLER_SAVE_MODE(REGNO,NREGS,MODE) \
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145
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488 ((TARGET_LARGE && ((NREGS) <= 2)) ? PSImode \
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489 : choose_hard_reg_mode ((REGNO), (NREGS), NULL))
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111
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490
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|
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491 #define ACCUMULATE_OUTGOING_ARGS 1
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492
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145
|
493 #define HAVE_POST_INCREMENT 1
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494
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495 /* This (unsurprisingly) improves code size in the vast majority of cases, we
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496 want to prevent any instructions using a "store post increment" from being
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497 generated. These will have to later be reloaded since msp430 does not
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498 support post inc for the destination operand. */
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499 #define USE_STORE_POST_INCREMENT(MODE) 0
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500
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|
|
501 /* Many other targets set USE_LOAD_POST_INCREMENT to 0. For msp430-elf
|
|
|
502 the benefit of disabling it is not clear. When looking at code size, on
|
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|
503 average, there is a slight advantage to leaving it enabled. */
|
|
|
504
|
|
111
|
505 #undef ASM_DECLARE_FUNCTION_NAME
|
|
|
506 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
|
|
|
507 msp430_start_function ((FILE), (NAME), (DECL))
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|
508
|
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|
509 #define TARGET_HAS_NO_HW_DIVIDE (! TARGET_HWMULT)
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|
|
510
|
|
145
|
511 void msp430_register_pre_includes (const char *sysroot ATTRIBUTE_UNUSED,
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|
|
512 const char *iprefix ATTRIBUTE_UNUSED,
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|
|
513 int stdinc ATTRIBUTE_UNUSED);
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|
|
514 #undef TARGET_EXTRA_PRE_INCLUDES
|
|
|
515 #define TARGET_EXTRA_PRE_INCLUDES msp430_register_pre_includes
|
|
|
516
|
|
111
|
517 #undef USE_SELECT_SECTION_FOR_FUNCTIONS
|
|
|
518 #define USE_SELECT_SECTION_FOR_FUNCTIONS 1
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|
519
|
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|
520 #define ASM_OUTPUT_ALIGNED_DECL_COMMON(FILE, DECL, NAME, SIZE, ALIGN) \
|
|
|
521 msp430_output_aligned_decl_common ((FILE), (DECL), (NAME), (SIZE), (ALIGN))
|
|
145
|
522
|
|
|
523 #define SYMBOL_FLAG_LOW_MEM (SYMBOL_FLAG_MACH_DEP << 0)
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