--- a/gcc/config/mips/mips.h	Fri Feb 12 23:41:23 2010 +0900
+++ b/gcc/config/mips/mips.h	Mon May 24 12:47:05 2010 +0900
@@ -1,6 +1,6 @@
 /* Definitions of target machine for GNU compiler.  MIPS version.
    Copyright (C) 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998
-   1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009
+   1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009, 2010
    Free Software Foundation, Inc.
    Contributed by A. Lichnewsky (lich@inria.inria.fr).
    Changed by Michael Meissner	(meissner@osf.org).
@@ -228,7 +228,7 @@
 #define TARGET_GPWORD				\
   (TARGET_ABICALLS				\
    && !TARGET_ABSOLUTE_ABICALLS			\
-   && !(mips_abi == ABI_64 && TARGET_IRIX))
+   && !(mips_abi == ABI_64 && TARGET_IRIX6))
 
 /* True if the output must have a writable .eh_frame.
    See ASM_PREFERRED_EH_DATA_FORMAT for details.  */
@@ -369,7 +369,6 @@
 #define TARGET_SYNC_AFTER_SC (!TARGET_OCTEON)
 
 /* IRIX specific stuff.  */
-#define TARGET_IRIX	   0
 #define TARGET_IRIX6	   0
 
 /* Define preprocessor macros for the -march and -mtune options.
@@ -396,7 +395,7 @@
   do									\
     {									\
       /* Everyone but IRIX defines this to mips.  */            	\
-      if (!TARGET_IRIX)                                         	\
+      if (!TARGET_IRIX6)                                         	\
 	builtin_assert ("machine=mips");                        	\
 									\
       builtin_assert ("cpu=mips");					\
@@ -416,7 +415,7 @@
       if (TARGET_64BIT)							\
 	builtin_define ("__mips64");					\
 									\
-      if (!TARGET_IRIX)							\
+      if (!TARGET_IRIX6)						\
 	{								\
 	  /* Treat _R3000 and _R4000 like register-size			\
 	     defines, which is how they've historically			\
@@ -537,7 +536,9 @@
 									\
       /* These defines reflect the ABI in use, not whether the  	\
 	 FPU is directly accessible.  */				\
-      if (TARGET_HARD_FLOAT_ABI)					\
+      if (TARGET_NO_FLOAT)						\
+	builtin_define ("__mips_no_float");				\
+      else if (TARGET_HARD_FLOAT_ABI)					\
 	builtin_define ("__mips_hard_float");				\
       else								\
 	builtin_define ("__mips_soft_float");				\
@@ -2006,13 +2007,6 @@
 
 #define INDEX_REG_CLASS NO_REGS
 
-/* When SMALL_REGISTER_CLASSES is nonzero, the compiler allows
-   registers explicitly used in the rtl to be used as spill registers
-   but prevents the compiler from extending the lifetime of these
-   registers.  */
-
-#define SMALL_REGISTER_CLASSES (TARGET_MIPS16)
-
 /* We generally want to put call-clobbered registers ahead of
    call-saved ones.  (IRA expects this.)  */
 
@@ -2059,12 +2053,12 @@
   182,183,184,185,186,187						\
 }
 
-/* ORDER_REGS_FOR_LOCAL_ALLOC is a macro which permits reg_alloc_order
+/* ADJUST_REG_ALLOC_ORDER is a macro which permits reg_alloc_order
    to be rearranged based on a particular function.  On the mips16, we
    want to allocate $24 (T_REG) before other registers for
    instructions for which it is possible.  */
 
-#define ORDER_REGS_FOR_LOCAL_ALLOC mips_order_regs_for_local_alloc ()
+#define ADJUST_REG_ALLOC_ORDER mips_order_regs_for_local_alloc ()
 
 /* True if VALUE is an unsigned 6-bit number.  */