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1 // Mutual exclusion spin locks.
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2
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3 #include "types.h"
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4 #include "defs.h"
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5 #include "param.h"
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6 #include "arm.h"
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7 #include "memlayout.h"
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8 #include "mmu.h"
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9 #include "proc.h"
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10 #include "spinlock.h"
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11
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52
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12 #define __ncode __code
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13 #
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0
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14 void initlock(struct spinlock *lk, char *name)
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15 {
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16 lk->name = name;
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17 lk->locked = 0;
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18 lk->cpu = 0;
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19 }
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20
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21 // For single CPU systems, there is no need for spinlock.
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22 // Add the support when multi-processor is supported.
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23
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24
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25 // Acquire the lock.
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26 // Loops (spins) until the lock is acquired.
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27 // Holding a lock for a long time may cause
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28 // other CPUs to waste time spinning to acquire it.
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29 void acquire(struct spinlock *lk)
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30 {
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31 pushcli(); // disable interrupts to avoid deadlock.
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32 lk->locked = 1; // set the lock status to make the kernel happy
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33
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34 #if 0
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35 if(holding(lk))
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36 panic("acquire");
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37
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38 // The xchg is atomic.
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39 // It also serializes, so that reads after acquire are not
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40 // reordered before it.
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41 while(xchg(&lk->locked, 1) != 0)
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42 ;
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43
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44 // Record info about lock acquisition for debugging.
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45 lk->cpu = cpu;
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46 getcallerpcs(get_fp(), lk->pcs);
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47
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48 #endif
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49 }
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50
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37
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51 /*
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35
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52 void cbc_acquire(struct spinlock *lk, __code (*next)(int ret))
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53 {
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54 pushcli(); // disable interrupts to avoid deadlock.
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55 lk->locked = 1; // set the lock status to make the kernel happy
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56
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57 #if 0
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58 if(holding(lk))
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59 panic("acquire");
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60
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61 // The xchg is atomic.
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62 // It also serializes, so that reads after acquire are not
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63 // reordered before it.
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64 while(xchg(&lk->locked, 1) != 0)
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65 ;
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66
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67 // Record info about lock acquisition for debugging.
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68 lk->cpu = cpu;
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69 getcallerpcs(get_fp(), lk->pcs);
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70
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71 #endif
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72 goto next();
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73 }
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37
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74 */
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35
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75
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37
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76 /*
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77 // Release the lock.
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35
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78 void cbc_release(struct spinlock *lk, __code (*next)(int ret))
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79 {
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80 #if 0
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81 if(!holding(lk))
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82 panic("release");
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83
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84 lk->pcs[0] = 0;
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85 lk->cpu = 0;
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86
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87 // The xchg serializes, so that reads before release are
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88 // not reordered after it. The 1996 PentiumPro manual (Volume 3,
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89 // 7.2) says reads can be carried out speculatively and in
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90 // any order, which implies we need to serialize here.
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91 // But the 2007 Intel 64 Architecture Memory Ordering White
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92 // Paper says that Intel 64 and IA-32 will not move a load
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93 // after a store. So lock->locked = 0 would work here.
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94 // The xchg being asm volatile ensures gcc emits it after
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95 // the above assignments (and after the critical section).
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96 xchg(&lk->locked, 0);
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97 #endif
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98
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99 lk->locked = 0; // set the lock state to keep the kernel happy
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100 popcli();
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101 goto next();
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102 }
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37
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103 */
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35
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104
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0
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105 void release(struct spinlock *lk)
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106 {
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107 #if 0
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108 if(!holding(lk))
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109 panic("release");
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110
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111 lk->pcs[0] = 0;
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112 lk->cpu = 0;
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113
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114 // The xchg serializes, so that reads before release are
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115 // not reordered after it. The 1996 PentiumPro manual (Volume 3,
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116 // 7.2) says reads can be carried out speculatively and in
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117 // any order, which implies we need to serialize here.
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118 // But the 2007 Intel 64 Architecture Memory Ordering White
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119 // Paper says that Intel 64 and IA-32 will not move a load
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120 // after a store. So lock->locked = 0 would work here.
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121 // The xchg being asm volatile ensures gcc emits it after
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122 // the above assignments (and after the critical section).
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123 xchg(&lk->locked, 0);
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124 #endif
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125
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126 lk->locked = 0; // set the lock state to keep the kernel happy
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127 popcli();
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128 }
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129
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130
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131 // Check whether this cpu is holding the lock.
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132 int holding(struct spinlock *lock)
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133 {
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134 return lock->locked; // && lock->cpu == cpus;
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135 }
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136
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