Mercurial > hg > Members > kono > os9 > sbc09
annotate engine.c @ 7:a6db579d8c11
level 2 rom preparing...
author | Shinji KONO <kono@ie.u-ryukyu.ac.jp> |
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date | Thu, 05 Jul 2018 02:00:14 +0900 |
parents | 35028b396a35 |
children | cb7aa75418b8 |
rev | line source |
---|---|
0 | 1 /* 6809 Simulator V09. |
2 | |
3 created 1994,1995 by L.C. Benschop. | |
4 copyleft (c) 1994-2014 by the sbc09 team, see AUTHORS for more details. | |
5 license: GNU General Public License version 2, see LICENSE for more details. | |
6 | |
7 This program simulates a 6809 processor. | |
8 | |
9 System dependencies: short must be 16 bits. | |
10 char must be 8 bits. | |
11 long must be more than 16 bits. | |
12 arrays up to 65536 bytes must be supported. | |
13 machine must be twos complement. | |
14 Most Unix machines will work. For MSODS you need long pointers | |
15 and you may have to malloc() the mem array of 65536 bytes. | |
16 | |
17 Special instructions: | |
18 SWI2 writes char to stdout from register B. | |
19 SWI3 reads char from stdout to register B, sets carry at EOF. | |
20 (or when no key available when using term control). | |
21 SWI retains its normal function. | |
22 CWAI and SYNC stop simulator. | |
23 Note: special instructions are gone for now. | |
24 | |
25 ACIA emulation at port $E000 | |
26 | |
27 Note: BIG_ENDIAN option is no longer needed. | |
28 */ | |
29 | |
30 #include <stdio.h> | |
31 #include <unistd.h> | |
32 | |
33 #define engine | |
34 #include "v09.h" | |
35 | |
36 #define USLEEP 1000 | |
37 Byte aca,acb; | |
38 Byte *breg=&aca,*areg=&acb; | |
39 static int tracetrick=0; | |
40 extern int romstart; | |
41 | |
4 | 42 #ifdef USE_MMU |
5 | 43 static inline Byte * mem0(Byte *iphymem, Word adr, Byte *immu) { return & iphymem[ ( immu[ (adr) >> 13 ] <<13 ) + ((adr) & 0x1fff )]; }; |
44 #define mem(adr) (*mem0(iphymem, adr,immu)) | |
4 | 45 #else |
46 #define mem(adr) mem[adr] | |
47 #endif | |
48 | |
49 | |
50 #define GETWORD(a) (mem(a)<<8|mem((a)+1)) | |
51 #define SETBYTE(a,n) {if(!(a>=romstart))mem(a)=n;} | |
52 #define SETWORD(a,n) if(!(a>=romstart)){mem(a)=(n)>>8;mem((a)+1)=n;} | |
0 | 53 /* Two bytes of a word are fetched separately because of |
54 the possible wrap-around at address $ffff and alignment | |
55 */ | |
56 | |
4 | 57 #define IMMBYTE(b) b=mem(ipcreg++); |
0 | 58 #define IMMWORD(w) {w=GETWORD(ipcreg);ipcreg+=2;} |
59 | |
60 #define PUSHBYTE(b) {--isreg;SETBYTE(isreg,b)} | |
61 #define PUSHWORD(w) {isreg-=2;SETWORD(isreg,w)} | |
4 | 62 #define PULLBYTE(b) b=mem(isreg++); |
0 | 63 #define PULLWORD(w) {w=GETWORD(isreg);isreg+=2;} |
64 #define PSHUBYTE(b) {--iureg;SETBYTE(iureg,b)} | |
65 #define PSHUWORD(w) {iureg-=2;SETWORD(iureg,w)} | |
4 | 66 #define PULUBYTE(b) b=mem(iureg++); |
0 | 67 #define PULUWORD(w) {w=GETWORD(iureg);iureg+=2;} |
68 | |
69 #define SIGNED(b) ((Word)(b&0x80?b|0xff00:b)) | |
70 | |
71 #define GETDREG ((iareg<<8)|ibreg) | |
72 #define SETDREG(n) {iareg=(n)>>8;ibreg=(n);} | |
73 | |
74 /* Macros for addressing modes (postbytes have their own code) */ | |
75 #define DIRECT {IMMBYTE(eaddr) eaddr|=(idpreg<<8);} | |
76 #define IMM8 {eaddr=ipcreg++;} | |
77 #define IMM16 {eaddr=ipcreg;ipcreg+=2;} | |
78 #define EXTENDED {IMMWORD(eaddr)} | |
79 | |
80 /* macros to set status flags */ | |
81 #define SEC iccreg|=0x01; | |
82 #define CLC iccreg&=0xfe; | |
83 #define SEZ iccreg|=0x04; | |
84 #define CLZ iccreg&=0xfb; | |
85 #define SEN iccreg|=0x08; | |
86 #define CLN iccreg&=0xf7; | |
87 #define SEV iccreg|=0x02; | |
88 #define CLV iccreg&=0xfd; | |
89 #define SEH iccreg|=0x20; | |
90 #define CLH iccreg&=0xdf; | |
91 | |
92 /* set N and Z flags depending on 8 or 16 bit result */ | |
93 #define SETNZ8(b) {if(b)CLZ else SEZ if(b&0x80)SEN else CLN} | |
94 #define SETNZ16(b) {if(b)CLZ else SEZ if(b&0x8000)SEN else CLN} | |
95 | |
96 #define SETSTATUS(a,b,res) if((a^b^res)&0x10) SEH else CLH \ | |
97 if((a^b^res^(res>>1))&0x80)SEV else CLV \ | |
98 if(res&0x100)SEC else CLC SETNZ8((Byte)res) | |
99 | |
100 #define SETSTATUSD(a,b,res) {if(res&0x10000) SEC else CLC \ | |
101 if(((res>>1)^a^b^res)&0x8000) SEV else CLV \ | |
102 SETNZ16((Word)res)} | |
103 | |
104 /* Macros for branch instructions */ | |
105 #define BRANCH(f) if(!iflag){IMMBYTE(tb) if(f)ipcreg+=SIGNED(tb);}\ | |
106 else{IMMWORD(tw) if(f)ipcreg+=tw;} | |
107 #define NXORV ((iccreg&0x08)^((iccreg&0x02)<<2)) | |
108 | |
109 /* MAcros for setting/getting registers in TFR/EXG instructions */ | |
110 #define GETREG(val,reg) switch(reg) {\ | |
111 case 0: val=GETDREG;break;\ | |
112 case 1: val=ixreg;break;\ | |
113 case 2: val=iyreg;break;\ | |
114 case 3: val=iureg;break;\ | |
115 case 4: val=isreg;break;\ | |
116 case 5: val=ipcreg;break;\ | |
117 case 8: val=iareg;break;\ | |
118 case 9: val=ibreg;break;\ | |
119 case 10: val=iccreg;break;\ | |
120 case 11: val=idpreg;break;} | |
121 | |
122 #define SETREG(val,reg) switch(reg) {\ | |
123 case 0: SETDREG(val) break;\ | |
124 case 1: ixreg=val;break;\ | |
125 case 2: iyreg=val;break;\ | |
126 case 3: iureg=val;break;\ | |
127 case 4: isreg=val;break;\ | |
128 case 5: ipcreg=val;break;\ | |
129 case 8: iareg=val;break;\ | |
130 case 9: ibreg=val;break;\ | |
131 case 10: iccreg=val;break;\ | |
132 case 11: idpreg=val;break;} | |
133 | |
134 /* Macros for load and store of accumulators. Can be modified to check | |
135 for port addresses */ | |
7
a6db579d8c11
level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
5
diff
changeset
|
136 #define LOADAC(reg) if((eaddr&0xff00)!=(IOPAGE&0xff00))reg=mem(eaddr);else\ |
0 | 137 reg=do_input(eaddr&0xff); |
7
a6db579d8c11
level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
5
diff
changeset
|
138 #define STOREAC(reg) if((eaddr&0xff00)!=(IOPAGE&0xff00))SETBYTE(eaddr,reg)else\ |
0 | 139 do_output(eaddr&0xff,reg); |
140 | |
141 #define LOADREGS ixreg=xreg;iyreg=yreg;\ | |
142 iureg=ureg;isreg=sreg;\ | |
143 ipcreg=pcreg;\ | |
144 iareg=*areg;ibreg=*breg;\ | |
4 | 145 idpreg=dpreg;iccreg=ccreg;immu=mmu; |
0 | 146 |
147 #define SAVEREGS xreg=ixreg;yreg=iyreg;\ | |
148 ureg=iureg;sreg=isreg;\ | |
149 pcreg=ipcreg;\ | |
150 *areg=iareg;*breg=ibreg;\ | |
4 | 151 dpreg=idpreg;ccreg=iccreg;mmu=immu; |
0 | 152 |
153 | |
154 unsigned char haspostbyte[] = { | |
155 /*0*/ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, | |
156 /*1*/ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, | |
157 /*2*/ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, | |
158 /*3*/ 1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0, | |
159 /*4*/ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, | |
160 /*5*/ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, | |
161 /*6*/ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, | |
162 /*7*/ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, | |
163 /*8*/ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, | |
164 /*9*/ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, | |
165 /*A*/ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, | |
166 /*B*/ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, | |
167 /*C*/ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, | |
168 /*D*/ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, | |
169 /*E*/ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, | |
170 /*F*/ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, | |
171 }; | |
172 | |
173 void interpr(void) | |
174 { | |
175 Word ixreg,iyreg,iureg,isreg,ipcreg; | |
176 Byte idpreg,iccreg,iareg,ibreg; | |
177 /* Make local variables for the registers. On a real processor (non-Intel) | |
178 these could be implemented as fast registers. */ | |
179 Word eaddr; /* effective address */ | |
180 Byte ireg; /* instruction register */ | |
181 Byte iflag; /* flag to indicate $10 or $11 prebyte */ | |
182 Byte tb;Word tw; | |
4 | 183 Byte *immu = 0; |
184 #ifdef USE_MMU | |
185 const int imemsize = memsize; | |
186 Byte *iphymem = (Byte *)phymem; | |
187 immu = iphymem + imemsize - 0x10000 + 0xffa0; | |
188 #endif | |
0 | 189 LOADREGS |
190 for(;;){ | |
191 if(attention) { | |
192 if(tracing && ipcreg>=tracelo && ipcreg<=tracehi) | |
193 {SAVEREGS do_trace(tracefile); } | |
194 if(escape){ SAVEREGS do_escape(); LOADREGS } | |
195 if(irq) { | |
196 if(irq==1&&!(iccreg&0x10)) { /* standard IRQ */ | |
197 PUSHWORD(ipcreg) | |
198 PUSHWORD(iureg) | |
199 PUSHWORD(iyreg) | |
200 PUSHWORD(ixreg) | |
201 PUSHBYTE(idpreg) | |
202 PUSHBYTE(ibreg) | |
203 PUSHBYTE(iareg) | |
204 PUSHBYTE(iccreg) | |
205 iccreg|=0x90; | |
206 ipcreg=GETWORD(0xfff8); | |
207 } | |
208 if(irq==2&&!(iccreg&0x40)) { /* Fast IRQ */ | |
209 PUSHWORD(ipcreg) | |
210 PUSHBYTE(iccreg) | |
211 iccreg&=0x7f; | |
212 iccreg|=0x50; | |
213 ipcreg=GETWORD(0xfff6); | |
214 } | |
215 if(!tracing)attention=0; | |
216 irq=0; | |
217 } | |
218 } | |
219 iflag=0; | |
220 flaginstr: /* $10 and $11 instructions return here */ | |
4 | 221 ireg=mem(ipcreg++); |
0 | 222 if(haspostbyte[ireg]) { |
4 | 223 Byte postbyte=mem(ipcreg++); |
0 | 224 switch(postbyte) { |
225 case 0x00: eaddr=ixreg;break; | |
226 case 0x01: eaddr=ixreg+1;break; | |
227 case 0x02: eaddr=ixreg+2;break; | |
228 case 0x03: eaddr=ixreg+3;break; | |
229 case 0x04: eaddr=ixreg+4;break; | |
230 case 0x05: eaddr=ixreg+5;break; | |
231 case 0x06: eaddr=ixreg+6;break; | |
232 case 0x07: eaddr=ixreg+7;break; | |
233 case 0x08: eaddr=ixreg+8;break; | |
234 case 0x09: eaddr=ixreg+9;break; | |
235 case 0x0A: eaddr=ixreg+10;break; | |
236 case 0x0B: eaddr=ixreg+11;break; | |
237 case 0x0C: eaddr=ixreg+12;break; | |
238 case 0x0D: eaddr=ixreg+13;break; | |
239 case 0x0E: eaddr=ixreg+14;break; | |
240 case 0x0F: eaddr=ixreg+15;break; | |
241 case 0x10: eaddr=ixreg-16;break; | |
242 case 0x11: eaddr=ixreg-15;break; | |
243 case 0x12: eaddr=ixreg-14;break; | |
244 case 0x13: eaddr=ixreg-13;break; | |
245 case 0x14: eaddr=ixreg-12;break; | |
246 case 0x15: eaddr=ixreg-11;break; | |
247 case 0x16: eaddr=ixreg-10;break; | |
248 case 0x17: eaddr=ixreg-9;break; | |
249 case 0x18: eaddr=ixreg-8;break; | |
250 case 0x19: eaddr=ixreg-7;break; | |
251 case 0x1A: eaddr=ixreg-6;break; | |
252 case 0x1B: eaddr=ixreg-5;break; | |
253 case 0x1C: eaddr=ixreg-4;break; | |
254 case 0x1D: eaddr=ixreg-3;break; | |
255 case 0x1E: eaddr=ixreg-2;break; | |
256 case 0x1F: eaddr=ixreg-1;break; | |
257 case 0x20: eaddr=iyreg;break; | |
258 case 0x21: eaddr=iyreg+1;break; | |
259 case 0x22: eaddr=iyreg+2;break; | |
260 case 0x23: eaddr=iyreg+3;break; | |
261 case 0x24: eaddr=iyreg+4;break; | |
262 case 0x25: eaddr=iyreg+5;break; | |
263 case 0x26: eaddr=iyreg+6;break; | |
264 case 0x27: eaddr=iyreg+7;break; | |
265 case 0x28: eaddr=iyreg+8;break; | |
266 case 0x29: eaddr=iyreg+9;break; | |
267 case 0x2A: eaddr=iyreg+10;break; | |
268 case 0x2B: eaddr=iyreg+11;break; | |
269 case 0x2C: eaddr=iyreg+12;break; | |
270 case 0x2D: eaddr=iyreg+13;break; | |
271 case 0x2E: eaddr=iyreg+14;break; | |
272 case 0x2F: eaddr=iyreg+15;break; | |
273 case 0x30: eaddr=iyreg-16;break; | |
274 case 0x31: eaddr=iyreg-15;break; | |
275 case 0x32: eaddr=iyreg-14;break; | |
276 case 0x33: eaddr=iyreg-13;break; | |
277 case 0x34: eaddr=iyreg-12;break; | |
278 case 0x35: eaddr=iyreg-11;break; | |
279 case 0x36: eaddr=iyreg-10;break; | |
280 case 0x37: eaddr=iyreg-9;break; | |
281 case 0x38: eaddr=iyreg-8;break; | |
282 case 0x39: eaddr=iyreg-7;break; | |
283 case 0x3A: eaddr=iyreg-6;break; | |
284 case 0x3B: eaddr=iyreg-5;break; | |
285 case 0x3C: eaddr=iyreg-4;break; | |
286 case 0x3D: eaddr=iyreg-3;break; | |
287 case 0x3E: eaddr=iyreg-2;break; | |
288 case 0x3F: eaddr=iyreg-1;break; | |
289 case 0x40: eaddr=iureg;break; | |
290 case 0x41: eaddr=iureg+1;break; | |
291 case 0x42: eaddr=iureg+2;break; | |
292 case 0x43: eaddr=iureg+3;break; | |
293 case 0x44: eaddr=iureg+4;break; | |
294 case 0x45: eaddr=iureg+5;break; | |
295 case 0x46: eaddr=iureg+6;break; | |
296 case 0x47: eaddr=iureg+7;break; | |
297 case 0x48: eaddr=iureg+8;break; | |
298 case 0x49: eaddr=iureg+9;break; | |
299 case 0x4A: eaddr=iureg+10;break; | |
300 case 0x4B: eaddr=iureg+11;break; | |
301 case 0x4C: eaddr=iureg+12;break; | |
302 case 0x4D: eaddr=iureg+13;break; | |
303 case 0x4E: eaddr=iureg+14;break; | |
304 case 0x4F: eaddr=iureg+15;break; | |
305 case 0x50: eaddr=iureg-16;break; | |
306 case 0x51: eaddr=iureg-15;break; | |
307 case 0x52: eaddr=iureg-14;break; | |
308 case 0x53: eaddr=iureg-13;break; | |
309 case 0x54: eaddr=iureg-12;break; | |
310 case 0x55: eaddr=iureg-11;break; | |
311 case 0x56: eaddr=iureg-10;break; | |
312 case 0x57: eaddr=iureg-9;break; | |
313 case 0x58: eaddr=iureg-8;break; | |
314 case 0x59: eaddr=iureg-7;break; | |
315 case 0x5A: eaddr=iureg-6;break; | |
316 case 0x5B: eaddr=iureg-5;break; | |
317 case 0x5C: eaddr=iureg-4;break; | |
318 case 0x5D: eaddr=iureg-3;break; | |
319 case 0x5E: eaddr=iureg-2;break; | |
320 case 0x5F: eaddr=iureg-1;break; | |
321 case 0x60: eaddr=isreg;break; | |
322 case 0x61: eaddr=isreg+1;break; | |
323 case 0x62: eaddr=isreg+2;break; | |
324 case 0x63: eaddr=isreg+3;break; | |
325 case 0x64: eaddr=isreg+4;break; | |
326 case 0x65: eaddr=isreg+5;break; | |
327 case 0x66: eaddr=isreg+6;break; | |
328 case 0x67: eaddr=isreg+7;break; | |
329 case 0x68: eaddr=isreg+8;break; | |
330 case 0x69: eaddr=isreg+9;break; | |
331 case 0x6A: eaddr=isreg+10;break; | |
332 case 0x6B: eaddr=isreg+11;break; | |
333 case 0x6C: eaddr=isreg+12;break; | |
334 case 0x6D: eaddr=isreg+13;break; | |
335 case 0x6E: eaddr=isreg+14;break; | |
336 case 0x6F: eaddr=isreg+15;break; | |
337 case 0x70: eaddr=isreg-16;break; | |
338 case 0x71: eaddr=isreg-15;break; | |
339 case 0x72: eaddr=isreg-14;break; | |
340 case 0x73: eaddr=isreg-13;break; | |
341 case 0x74: eaddr=isreg-12;break; | |
342 case 0x75: eaddr=isreg-11;break; | |
343 case 0x76: eaddr=isreg-10;break; | |
344 case 0x77: eaddr=isreg-9;break; | |
345 case 0x78: eaddr=isreg-8;break; | |
346 case 0x79: eaddr=isreg-7;break; | |
347 case 0x7A: eaddr=isreg-6;break; | |
348 case 0x7B: eaddr=isreg-5;break; | |
349 case 0x7C: eaddr=isreg-4;break; | |
350 case 0x7D: eaddr=isreg-3;break; | |
351 case 0x7E: eaddr=isreg-2;break; | |
352 case 0x7F: eaddr=isreg-1;break; | |
353 case 0x80: eaddr=ixreg;ixreg++;break; | |
354 case 0x81: eaddr=ixreg;ixreg+=2;break; | |
355 case 0x82: ixreg--;eaddr=ixreg;break; | |
356 case 0x83: ixreg-=2;eaddr=ixreg;break; | |
357 case 0x84: eaddr=ixreg;break; | |
358 case 0x85: eaddr=ixreg+SIGNED(ibreg);break; | |
359 case 0x86: eaddr=ixreg+SIGNED(iareg);break; | |
360 case 0x87: eaddr=0;break; /*ILELGAL*/ | |
361 case 0x88: IMMBYTE(eaddr);eaddr=ixreg+SIGNED(eaddr);break; | |
362 case 0x89: IMMWORD(eaddr);eaddr+=ixreg;break; | |
363 case 0x8A: eaddr=0;break; /*ILLEGAL*/ | |
364 case 0x8B: eaddr=ixreg+GETDREG;break; | |
365 case 0x8C: IMMBYTE(eaddr);eaddr=ipcreg+SIGNED(eaddr);break; | |
366 case 0x8D: IMMWORD(eaddr);eaddr+=ipcreg;break; | |
367 case 0x8E: eaddr=0;break; /*ILLEGAL*/ | |
368 case 0x8F: IMMWORD(eaddr);break; | |
369 case 0x90: eaddr=ixreg;ixreg++;eaddr=GETWORD(eaddr);break; | |
370 case 0x91: eaddr=ixreg;ixreg+=2;eaddr=GETWORD(eaddr);break; | |
371 case 0x92: ixreg--;eaddr=ixreg;eaddr=GETWORD(eaddr);break; | |
372 case 0x93: ixreg-=2;eaddr=ixreg;eaddr=GETWORD(eaddr);break; | |
373 case 0x94: eaddr=ixreg;eaddr=GETWORD(eaddr);break; | |
374 case 0x95: eaddr=ixreg+SIGNED(ibreg);eaddr=GETWORD(eaddr);break; | |
375 case 0x96: eaddr=ixreg+SIGNED(iareg);eaddr=GETWORD(eaddr);break; | |
376 case 0x97: eaddr=0;break; /*ILELGAL*/ | |
377 case 0x98: IMMBYTE(eaddr);eaddr=ixreg+SIGNED(eaddr); | |
378 eaddr=GETWORD(eaddr);break; | |
379 case 0x99: IMMWORD(eaddr);eaddr+=ixreg;eaddr=GETWORD(eaddr);break; | |
380 case 0x9A: eaddr=0;break; /*ILLEGAL*/ | |
381 case 0x9B: eaddr=ixreg+GETDREG;eaddr=GETWORD(eaddr);break; | |
382 case 0x9C: IMMBYTE(eaddr);eaddr=ipcreg+SIGNED(eaddr); | |
383 eaddr=GETWORD(eaddr);break; | |
384 case 0x9D: IMMWORD(eaddr);eaddr+=ipcreg;eaddr=GETWORD(eaddr);break; | |
385 case 0x9E: eaddr=0;break; /*ILLEGAL*/ | |
386 case 0x9F: IMMWORD(eaddr);eaddr=GETWORD(eaddr);break; | |
387 case 0xA0: eaddr=iyreg;iyreg++;break; | |
388 case 0xA1: eaddr=iyreg;iyreg+=2;break; | |
389 case 0xA2: iyreg--;eaddr=iyreg;break; | |
390 case 0xA3: iyreg-=2;eaddr=iyreg;break; | |
391 case 0xA4: eaddr=iyreg;break; | |
392 case 0xA5: eaddr=iyreg+SIGNED(ibreg);break; | |
393 case 0xA6: eaddr=iyreg+SIGNED(iareg);break; | |
394 case 0xA7: eaddr=0;break; /*ILELGAL*/ | |
395 case 0xA8: IMMBYTE(eaddr);eaddr=iyreg+SIGNED(eaddr);break; | |
396 case 0xA9: IMMWORD(eaddr);eaddr+=iyreg;break; | |
397 case 0xAA: eaddr=0;break; /*ILLEGAL*/ | |
398 case 0xAB: eaddr=iyreg+GETDREG;break; | |
399 case 0xAC: IMMBYTE(eaddr);eaddr=ipcreg+SIGNED(eaddr);break; | |
400 case 0xAD: IMMWORD(eaddr);eaddr+=ipcreg;break; | |
401 case 0xAE: eaddr=0;break; /*ILLEGAL*/ | |
402 case 0xAF: IMMWORD(eaddr);break; | |
403 case 0xB0: eaddr=iyreg;iyreg++;eaddr=GETWORD(eaddr);break; | |
404 case 0xB1: eaddr=iyreg;iyreg+=2;eaddr=GETWORD(eaddr);break; | |
405 case 0xB2: iyreg--;eaddr=iyreg;eaddr=GETWORD(eaddr);break; | |
406 case 0xB3: iyreg-=2;eaddr=iyreg;eaddr=GETWORD(eaddr);break; | |
407 case 0xB4: eaddr=iyreg;eaddr=GETWORD(eaddr);break; | |
408 case 0xB5: eaddr=iyreg+SIGNED(ibreg);eaddr=GETWORD(eaddr);break; | |
409 case 0xB6: eaddr=iyreg+SIGNED(iareg);eaddr=GETWORD(eaddr);break; | |
410 case 0xB7: eaddr=0;break; /*ILELGAL*/ | |
411 case 0xB8: IMMBYTE(eaddr);eaddr=iyreg+SIGNED(eaddr); | |
412 eaddr=GETWORD(eaddr);break; | |
413 case 0xB9: IMMWORD(eaddr);eaddr+=iyreg;eaddr=GETWORD(eaddr);break; | |
414 case 0xBA: eaddr=0;break; /*ILLEGAL*/ | |
415 case 0xBB: eaddr=iyreg+GETDREG;eaddr=GETWORD(eaddr);break; | |
416 case 0xBC: IMMBYTE(eaddr);eaddr=ipcreg+SIGNED(eaddr); | |
417 eaddr=GETWORD(eaddr);break; | |
418 case 0xBD: IMMWORD(eaddr);eaddr+=ipcreg;eaddr=GETWORD(eaddr);break; | |
419 case 0xBE: eaddr=0;break; /*ILLEGAL*/ | |
420 case 0xBF: IMMWORD(eaddr);eaddr=GETWORD(eaddr);break; | |
421 case 0xC0: eaddr=iureg;iureg++;break; | |
422 case 0xC1: eaddr=iureg;iureg+=2;break; | |
423 case 0xC2: iureg--;eaddr=iureg;break; | |
424 case 0xC3: iureg-=2;eaddr=iureg;break; | |
425 case 0xC4: eaddr=iureg;break; | |
426 case 0xC5: eaddr=iureg+SIGNED(ibreg);break; | |
427 case 0xC6: eaddr=iureg+SIGNED(iareg);break; | |
428 case 0xC7: eaddr=0;break; /*ILELGAL*/ | |
429 case 0xC8: IMMBYTE(eaddr);eaddr=iureg+SIGNED(eaddr);break; | |
430 case 0xC9: IMMWORD(eaddr);eaddr+=iureg;break; | |
431 case 0xCA: eaddr=0;break; /*ILLEGAL*/ | |
432 case 0xCB: eaddr=iureg+GETDREG;break; | |
433 case 0xCC: IMMBYTE(eaddr);eaddr=ipcreg+SIGNED(eaddr);break; | |
434 case 0xCD: IMMWORD(eaddr);eaddr+=ipcreg;break; | |
435 case 0xCE: eaddr=0;break; /*ILLEGAL*/ | |
436 case 0xCF: IMMWORD(eaddr);break; | |
437 case 0xD0: eaddr=iureg;iureg++;eaddr=GETWORD(eaddr);break; | |
438 case 0xD1: eaddr=iureg;iureg+=2;eaddr=GETWORD(eaddr);break; | |
439 case 0xD2: iureg--;eaddr=iureg;eaddr=GETWORD(eaddr);break; | |
440 case 0xD3: iureg-=2;eaddr=iureg;eaddr=GETWORD(eaddr);break; | |
441 case 0xD4: eaddr=iureg;eaddr=GETWORD(eaddr);break; | |
442 case 0xD5: eaddr=iureg+SIGNED(ibreg);eaddr=GETWORD(eaddr);break; | |
443 case 0xD6: eaddr=iureg+SIGNED(iareg);eaddr=GETWORD(eaddr);break; | |
444 case 0xD7: eaddr=0;break; /*ILELGAL*/ | |
445 case 0xD8: IMMBYTE(eaddr);eaddr=iureg+SIGNED(eaddr); | |
446 eaddr=GETWORD(eaddr);break; | |
447 case 0xD9: IMMWORD(eaddr);eaddr+=iureg;eaddr=GETWORD(eaddr);break; | |
448 case 0xDA: eaddr=0;break; /*ILLEGAL*/ | |
449 case 0xDB: eaddr=iureg+GETDREG;eaddr=GETWORD(eaddr);break; | |
450 case 0xDC: IMMBYTE(eaddr);eaddr=ipcreg+SIGNED(eaddr); | |
451 eaddr=GETWORD(eaddr);break; | |
452 case 0xDD: IMMWORD(eaddr);eaddr+=ipcreg;eaddr=GETWORD(eaddr);break; | |
453 case 0xDE: eaddr=0;break; /*ILLEGAL*/ | |
454 case 0xDF: IMMWORD(eaddr);eaddr=GETWORD(eaddr);break; | |
455 case 0xE0: eaddr=isreg;isreg++;break; | |
456 case 0xE1: eaddr=isreg;isreg+=2;break; | |
457 case 0xE2: isreg--;eaddr=isreg;break; | |
458 case 0xE3: isreg-=2;eaddr=isreg;break; | |
459 case 0xE4: eaddr=isreg;break; | |
460 case 0xE5: eaddr=isreg+SIGNED(ibreg);break; | |
461 case 0xE6: eaddr=isreg+SIGNED(iareg);break; | |
462 case 0xE7: eaddr=0;break; /*ILELGAL*/ | |
463 case 0xE8: IMMBYTE(eaddr);eaddr=isreg+SIGNED(eaddr);break; | |
464 case 0xE9: IMMWORD(eaddr);eaddr+=isreg;break; | |
465 case 0xEA: eaddr=0;break; /*ILLEGAL*/ | |
466 case 0xEB: eaddr=isreg+GETDREG;break; | |
467 case 0xEC: IMMBYTE(eaddr);eaddr=ipcreg+SIGNED(eaddr);break; | |
468 case 0xED: IMMWORD(eaddr);eaddr+=ipcreg;break; | |
469 case 0xEE: eaddr=0;break; /*ILLEGAL*/ | |
470 case 0xEF: IMMWORD(eaddr);break; | |
471 case 0xF0: eaddr=isreg;isreg++;eaddr=GETWORD(eaddr);break; | |
472 case 0xF1: eaddr=isreg;isreg+=2;eaddr=GETWORD(eaddr);break; | |
473 case 0xF2: isreg--;eaddr=isreg;eaddr=GETWORD(eaddr);break; | |
474 case 0xF3: isreg-=2;eaddr=isreg;eaddr=GETWORD(eaddr);break; | |
475 case 0xF4: eaddr=isreg;eaddr=GETWORD(eaddr);break; | |
476 case 0xF5: eaddr=isreg+SIGNED(ibreg);eaddr=GETWORD(eaddr);break; | |
477 case 0xF6: eaddr=isreg+SIGNED(iareg);eaddr=GETWORD(eaddr);break; | |
478 case 0xF7: eaddr=0;break; /*ILELGAL*/ | |
479 case 0xF8: IMMBYTE(eaddr);eaddr=isreg+SIGNED(eaddr); | |
480 eaddr=GETWORD(eaddr);break; | |
481 case 0xF9: IMMWORD(eaddr);eaddr+=isreg;eaddr=GETWORD(eaddr);break; | |
482 case 0xFA: eaddr=0;break; /*ILLEGAL*/ | |
483 case 0xFB: eaddr=isreg+GETDREG;eaddr=GETWORD(eaddr);break; | |
484 case 0xFC: IMMBYTE(eaddr);eaddr=ipcreg+SIGNED(eaddr); | |
485 eaddr=GETWORD(eaddr);break; | |
486 case 0xFD: IMMWORD(eaddr);eaddr+=ipcreg;eaddr=GETWORD(eaddr);break; | |
487 case 0xFE: eaddr=0;break; /*ILLEGAL*/ | |
488 case 0xFF: IMMWORD(eaddr);eaddr=GETWORD(eaddr);break; | |
489 } | |
490 } | |
491 switch(ireg) { | |
4 | 492 case 0x00: /*NEG direct*/ DIRECT tw=-mem(eaddr);SETSTATUS(0,mem(eaddr),tw) |
0 | 493 SETBYTE(eaddr,tw)break; |
494 case 0x01: break;/*ILLEGAL*/ | |
495 case 0x02: break;/*ILLEGAL*/ | |
4 | 496 case 0x03: /*COM direct*/ DIRECT tb=~mem(eaddr);SETNZ8(tb);SEC CLV |
0 | 497 SETBYTE(eaddr,tb)break; |
4 | 498 case 0x04: /*LSR direct*/ DIRECT tb=mem(eaddr);if(tb&0x01)SEC else CLC |
0 | 499 if(tb&0x10)SEH else CLH tb>>=1;SETNZ8(tb) |
500 SETBYTE(eaddr,tb)break; | |
501 case 0x05: break;/* ILLEGAL*/ | |
502 case 0x06: /*ROR direct*/ DIRECT tb=(iccreg&0x01)<<7; | |
4 | 503 if(mem(eaddr)&0x01)SEC else CLC |
504 tw=(mem(eaddr)>>1)+tb;SETNZ8(tw) | |
0 | 505 SETBYTE(eaddr,tw) |
506 break; | |
4 | 507 case 0x07: /*ASR direct*/ DIRECT tb=mem(eaddr);if(tb&0x01)SEC else CLC |
0 | 508 if(tb&0x10)SEH else CLH tb>>=1; |
509 if(tb&0x40)tb|=0x80;SETBYTE(eaddr,tb)SETNZ8(tb) | |
510 break; | |
4 | 511 case 0x08: /*ASL direct*/ DIRECT tw=mem(eaddr)<<1; |
512 SETSTATUS(mem(eaddr),mem(eaddr),tw) | |
0 | 513 SETBYTE(eaddr,tw)break; |
4 | 514 case 0x09: /*ROL direct*/ DIRECT tb=mem(eaddr);tw=iccreg&0x01; |
0 | 515 if(tb&0x80)SEC else CLC |
516 if((tb&0x80)^((tb<<1)&0x80))SEV else CLV | |
517 tb=(tb<<1)+tw;SETNZ8(tb) SETBYTE(eaddr,tb)break; | |
4 | 518 case 0x0A: /*DEC direct*/ DIRECT tb=mem(eaddr)-1;if(tb==0x7F)SEV else CLV |
0 | 519 SETNZ8(tb) SETBYTE(eaddr,tb)break; |
520 case 0x0B: break; /*ILLEGAL*/ | |
4 | 521 case 0x0C: /*INC direct*/ DIRECT tb=mem(eaddr)+1;if(tb==0x80)SEV else CLV |
0 | 522 SETNZ8(tb) SETBYTE(eaddr,tb)break; |
4 | 523 case 0x0D: /*TST direct*/ DIRECT tb=mem(eaddr);SETNZ8(tb) break; |
0 | 524 case 0x0E: /*JMP direct*/ DIRECT ipcreg=eaddr;break; |
525 case 0x0F: /*CLR direct*/ DIRECT SETBYTE(eaddr,0);CLN CLV SEZ CLC break; | |
526 case 0x10: /* flag10 */ iflag=1;goto flaginstr; | |
527 case 0x11: /* flag11 */ iflag=2;goto flaginstr; | |
528 case 0x12: /* NOP */ break; | |
529 case 0x13: /* SYNC */ | |
530 do usleep(USLEEP); /* Wait for IRQ */ | |
531 while(!irq && !attention); | |
532 if(iccreg&0x40)tracetrick=1; | |
533 break; | |
534 case 0x14: break; /*ILLEGAL*/ | |
535 case 0x15: break; /*ILLEGAL*/ | |
536 case 0x16: /*LBRA*/ IMMWORD(eaddr) ipcreg+=eaddr;break; | |
537 case 0x17: /*LBSR*/ IMMWORD(eaddr) PUSHWORD(ipcreg) ipcreg+=eaddr;break; | |
538 case 0x18: break; /*ILLEGAL*/ | |
539 case 0x19: /* DAA*/ tw=iareg; | |
540 if(iccreg&0x20)tw+=6; | |
541 if((tw&0x0f)>9)tw+=6; | |
542 if(iccreg&0x01)tw+=0x60; | |
543 if((tw&0xf0)>0x90)tw+=0x60; | |
544 if(tw&0x100)SEC | |
545 iareg=tw;break; | |
546 case 0x1A: /* ORCC*/ IMMBYTE(tb) iccreg|=tb;break; | |
547 case 0x1B: break; /*ILLEGAL*/ | |
548 case 0x1C: /* ANDCC*/ IMMBYTE(tb) iccreg&=tb;break; | |
549 case 0x1D: /* SEX */ tw=SIGNED(ibreg); SETNZ16(tw) SETDREG(tw) break; | |
550 case 0x1E: /* EXG */ IMMBYTE(tb) {Word t2;GETREG(tw,tb>>4) GETREG(t2,tb&15) | |
551 SETREG(t2,tb>>4) SETREG(tw,tb&15) } break; | |
552 case 0x1F: /* TFR */ IMMBYTE(tb) GETREG(tw,tb>>4) SETREG(tw,tb&15) break; | |
553 case 0x20: /* (L)BRA*/ BRANCH(1) break; | |
554 case 0x21: /* (L)BRN*/ BRANCH(0) break; | |
555 case 0x22: /* (L)BHI*/ BRANCH(!(iccreg&0x05)) break; | |
556 case 0x23: /* (L)BLS*/ BRANCH(iccreg&0x05) break; | |
557 case 0x24: /* (L)BCC*/ BRANCH(!(iccreg&0x01)) break; | |
558 case 0x25: /* (L)BCS*/ BRANCH(iccreg&0x01) break; | |
559 case 0x26: /* (L)BNE*/ BRANCH(!(iccreg&0x04)) break; | |
560 case 0x27: /* (L)BEQ*/ BRANCH(iccreg&0x04) break; | |
561 case 0x28: /* (L)BVC*/ BRANCH(!(iccreg&0x02)) break; | |
562 case 0x29: /* (L)BVS*/ BRANCH(iccreg&0x02) break; | |
563 case 0x2A: /* (L)BPL*/ BRANCH(!(iccreg&0x08)) break; | |
564 case 0x2B: /* (L)BMI*/ BRANCH(iccreg&0x08) break; | |
565 case 0x2C: /* (L)BGE*/ BRANCH(!NXORV) break; | |
566 case 0x2D: /* (L)BLT*/ BRANCH(NXORV) break; | |
567 case 0x2E: /* (L)BGT*/ BRANCH(!(NXORV||iccreg&0x04)) break; | |
568 case 0x2F: /* (L)BLE*/ BRANCH(NXORV||iccreg&0x04) break; | |
569 case 0x30: /* LEAX*/ ixreg=eaddr; if(ixreg) CLZ else SEZ break; | |
570 case 0x31: /* LEAY*/ iyreg=eaddr; if(iyreg) CLZ else SEZ break; | |
571 case 0x32: /* LEAS*/ isreg=eaddr;break; | |
572 case 0x33: /* LEAU*/ iureg=eaddr;break; | |
573 case 0x34: /* PSHS*/ IMMBYTE(tb) | |
574 if(tb&0x80)PUSHWORD(ipcreg) | |
575 if(tb&0x40)PUSHWORD(iureg) | |
576 if(tb&0x20)PUSHWORD(iyreg) | |
577 if(tb&0x10)PUSHWORD(ixreg) | |
578 if(tb&0x08)PUSHBYTE(idpreg) | |
579 if(tb&0x04)PUSHBYTE(ibreg) | |
580 if(tb&0x02)PUSHBYTE(iareg) | |
581 if(tb&0x01)PUSHBYTE(iccreg) break; | |
582 case 0x35: /* PULS*/ IMMBYTE(tb) | |
583 if(tb&0x01)PULLBYTE(iccreg) | |
584 if(tb&0x02)PULLBYTE(iareg) | |
585 if(tb&0x04)PULLBYTE(ibreg) | |
586 if(tb&0x08)PULLBYTE(idpreg) | |
587 if(tb&0x10)PULLWORD(ixreg) | |
588 if(tb&0x20)PULLWORD(iyreg) | |
589 if(tb&0x40)PULLWORD(iureg) | |
590 if(tb&0x80)PULLWORD(ipcreg) | |
591 if(tracetrick&&tb==0xff) { /* Arrange fake FIRQ after next insn | |
592 for hardware tracing */ | |
593 tracetrick=0; | |
594 irq=2; | |
595 attention=1; | |
596 goto flaginstr; | |
597 } | |
598 break; | |
599 case 0x36: /* PSHU*/ IMMBYTE(tb) | |
600 if(tb&0x80)PSHUWORD(ipcreg) | |
601 if(tb&0x40)PSHUWORD(isreg) | |
602 if(tb&0x20)PSHUWORD(iyreg) | |
603 if(tb&0x10)PSHUWORD(ixreg) | |
604 if(tb&0x08)PSHUBYTE(idpreg) | |
605 if(tb&0x04)PSHUBYTE(ibreg) | |
606 if(tb&0x02)PSHUBYTE(iareg) | |
607 if(tb&0x01)PSHUBYTE(iccreg) break; | |
608 case 0x37: /* PULU*/ IMMBYTE(tb) | |
609 if(tb&0x01)PULUBYTE(iccreg) | |
610 if(tb&0x02)PULUBYTE(iareg) | |
611 if(tb&0x04)PULUBYTE(ibreg) | |
612 if(tb&0x08)PULUBYTE(idpreg) | |
613 if(tb&0x10)PULUWORD(ixreg) | |
614 if(tb&0x20)PULUWORD(iyreg) | |
615 if(tb&0x40)PULUWORD(isreg) | |
616 if(tb&0x80)PULUWORD(ipcreg) break; | |
617 case 0x39: /* RTS*/ PULLWORD(ipcreg) break; | |
618 case 0x3A: /* ABX*/ ixreg+=ibreg; break; | |
619 case 0x3B: /* RTI*/ tb=iccreg&0x80; | |
620 PULLBYTE(iccreg) | |
621 if(tb) | |
622 { | |
623 PULLBYTE(iareg) | |
624 PULLBYTE(ibreg) | |
625 PULLBYTE(idpreg) | |
626 PULLWORD(ixreg) | |
627 PULLWORD(iyreg) | |
628 PULLWORD(iureg) | |
629 } | |
630 PULLWORD(ipcreg) break; | |
631 case 0x3C: /* CWAI*/ IMMBYTE(tb) | |
632 PUSHWORD(ipcreg) | |
633 PUSHWORD(iureg) | |
634 PUSHWORD(iyreg) | |
635 PUSHWORD(ixreg) | |
636 PUSHBYTE(idpreg) | |
637 PUSHBYTE(ibreg) | |
638 PUSHBYTE(iareg) | |
639 PUSHBYTE(iccreg) | |
640 iccreg&=tb; | |
641 iccreg|=0x80; | |
642 do usleep(USLEEP); /* Wait for IRQ */ | |
643 while(!attention && !((irq==1&&!(iccreg&0x10))||(irq==2&&!(iccreg&0x040)))); | |
644 if(irq==1)ipcreg=GETWORD(0xfff8); | |
645 else ipcreg=GETWORD(0xfff6); | |
646 irq=0; | |
647 if(!tracing)attention=0; | |
648 break; | |
649 case 0x3D: /* MUL*/ tw=iareg*ibreg; if(tw)CLZ else SEZ | |
650 if(tw&0x80) SEC else CLC SETDREG(tw) break; | |
651 case 0x3E: break; /*ILLEGAL*/ | |
652 case 0x3F: /* SWI (SWI2 SWI3)*/ { | |
653 PUSHWORD(ipcreg) | |
654 PUSHWORD(iureg) | |
655 PUSHWORD(iyreg) | |
656 PUSHWORD(ixreg) | |
657 PUSHBYTE(idpreg) | |
658 PUSHBYTE(ibreg) | |
659 PUSHBYTE(iareg) | |
660 PUSHBYTE(iccreg) | |
661 iccreg|=0x80; | |
662 if(!iflag)iccreg|=0x50; | |
663 switch(iflag) { | |
664 case 0:ipcreg=GETWORD(0xfffa);break; | |
665 case 1:ipcreg=GETWORD(0xfff4);break; | |
666 case 2:ipcreg=GETWORD(0xfff2);break; | |
667 } | |
668 }break; | |
669 case 0x40: /*NEGA*/ tw=-iareg;SETSTATUS(0,iareg,tw) | |
670 iareg=tw;break; | |
671 case 0x41: break;/*ILLEGAL*/ | |
672 case 0x42: break;/*ILLEGAL*/ | |
673 case 0x43: /*COMA*/ tb=~iareg;SETNZ8(tb);SEC CLV | |
674 iareg=tb;break; | |
675 case 0x44: /*LSRA*/ tb=iareg;if(tb&0x01)SEC else CLC | |
676 if(tb&0x10)SEH else CLH tb>>=1;SETNZ8(tb) | |
677 iareg=tb;break; | |
678 case 0x45: break;/* ILLEGAL*/ | |
679 case 0x46: /*RORA*/ tb=(iccreg&0x01)<<7; | |
680 if(iareg&0x01)SEC else CLC | |
681 iareg=(iareg>>1)+tb;SETNZ8(iareg) | |
682 break; | |
683 case 0x47: /*ASRA*/ tb=iareg;if(tb&0x01)SEC else CLC | |
684 if(tb&0x10)SEH else CLH tb>>=1; | |
685 if(tb&0x40)tb|=0x80;iareg=tb;SETNZ8(tb) | |
686 break; | |
687 case 0x48: /*ASLA*/ tw=iareg<<1; | |
688 SETSTATUS(iareg,iareg,tw) | |
689 iareg=tw;break; | |
690 case 0x49: /*ROLA*/ tb=iareg;tw=iccreg&0x01; | |
691 if(tb&0x80)SEC else CLC | |
692 if((tb&0x80)^((tb<<1)&0x80))SEV else CLV | |
693 tb=(tb<<1)+tw;SETNZ8(tb) iareg=tb;break; | |
694 case 0x4A: /*DECA*/ tb=iareg-1;if(tb==0x7F)SEV else CLV | |
695 SETNZ8(tb) iareg=tb;break; | |
696 case 0x4B: break; /*ILLEGAL*/ | |
697 case 0x4C: /*INCA*/ tb=iareg+1;if(tb==0x80)SEV else CLV | |
698 SETNZ8(tb) iareg=tb;break; | |
699 case 0x4D: /*TSTA*/ SETNZ8(iareg) break; | |
700 case 0x4E: break; /*ILLEGAL*/ | |
701 case 0x4F: /*CLRA*/ iareg=0;CLN CLV SEZ CLC break; | |
702 case 0x50: /*NEGB*/ tw=-ibreg;SETSTATUS(0,ibreg,tw) | |
703 ibreg=tw;break; | |
704 case 0x51: break;/*ILLEGAL*/ | |
705 case 0x52: break;/*ILLEGAL*/ | |
706 case 0x53: /*COMB*/ tb=~ibreg;SETNZ8(tb);SEC CLV | |
707 ibreg=tb;break; | |
708 case 0x54: /*LSRB*/ tb=ibreg;if(tb&0x01)SEC else CLC | |
709 if(tb&0x10)SEH else CLH tb>>=1;SETNZ8(tb) | |
710 ibreg=tb;break; | |
711 case 0x55: break;/* ILLEGAL*/ | |
712 case 0x56: /*RORB*/ tb=(iccreg&0x01)<<7; | |
713 if(ibreg&0x01)SEC else CLC | |
714 ibreg=(ibreg>>1)+tb;SETNZ8(ibreg) | |
715 break; | |
716 case 0x57: /*ASRB*/ tb=ibreg;if(tb&0x01)SEC else CLC | |
717 if(tb&0x10)SEH else CLH tb>>=1; | |
718 if(tb&0x40)tb|=0x80;ibreg=tb;SETNZ8(tb) | |
719 break; | |
720 case 0x58: /*ASLB*/ tw=ibreg<<1; | |
721 SETSTATUS(ibreg,ibreg,tw) | |
722 ibreg=tw;break; | |
723 case 0x59: /*ROLB*/ tb=ibreg;tw=iccreg&0x01; | |
724 if(tb&0x80)SEC else CLC | |
725 if((tb&0x80)^((tb<<1)&0x80))SEV else CLV | |
726 tb=(tb<<1)+tw;SETNZ8(tb) ibreg=tb;break; | |
727 case 0x5A: /*DECB*/ tb=ibreg-1;if(tb==0x7F)SEV else CLV | |
728 SETNZ8(tb) ibreg=tb;break; | |
729 case 0x5B: break; /*ILLEGAL*/ | |
730 case 0x5C: /*INCB*/ tb=ibreg+1;if(tb==0x80)SEV else CLV | |
731 SETNZ8(tb) ibreg=tb;break; | |
732 case 0x5D: /*TSTB*/ SETNZ8(ibreg) break; | |
733 case 0x5E: break; /*ILLEGAL*/ | |
734 case 0x5F: /*CLRB*/ ibreg=0;CLN CLV SEZ CLC break; | |
4 | 735 case 0x60: /*NEG indexed*/ tw=-mem(eaddr);SETSTATUS(0,mem(eaddr),tw) |
0 | 736 SETBYTE(eaddr,tw)break; |
737 case 0x61: break;/*ILLEGAL*/ | |
738 case 0x62: break;/*ILLEGAL*/ | |
4 | 739 case 0x63: /*COM indexed*/ tb=~mem(eaddr);SETNZ8(tb);SEC CLV |
0 | 740 SETBYTE(eaddr,tb)break; |
4 | 741 case 0x64: /*LSR indexed*/ tb=mem(eaddr);if(tb&0x01)SEC else CLC |
0 | 742 if(tb&0x10)SEH else CLH tb>>=1;SETNZ8(tb) |
743 SETBYTE(eaddr,tb)break; | |
744 case 0x65: break;/* ILLEGAL*/ | |
745 case 0x66: /*ROR indexed*/ tb=(iccreg&0x01)<<7; | |
4 | 746 if(mem(eaddr)&0x01)SEC else CLC |
747 tw=(mem(eaddr)>>1)+tb;SETNZ8(tw) | |
0 | 748 SETBYTE(eaddr,tw) |
749 break; | |
4 | 750 case 0x67: /*ASR indexed*/ tb=mem(eaddr);if(tb&0x01)SEC else CLC |
0 | 751 if(tb&0x10)SEH else CLH tb>>=1; |
752 if(tb&0x40)tb|=0x80;SETBYTE(eaddr,tb)SETNZ8(tb) | |
753 break; | |
4 | 754 case 0x68: /*ASL indexed*/ tw=mem(eaddr)<<1; |
755 SETSTATUS(mem(eaddr),mem(eaddr),tw) | |
0 | 756 SETBYTE(eaddr,tw)break; |
4 | 757 case 0x69: /*ROL indexed*/ tb=mem(eaddr);tw=iccreg&0x01; |
0 | 758 if(tb&0x80)SEC else CLC |
759 if((tb&0x80)^((tb<<1)&0x80))SEV else CLV | |
760 tb=(tb<<1)+tw;SETNZ8(tb) SETBYTE(eaddr,tb)break; | |
4 | 761 case 0x6A: /*DEC indexed*/ tb=mem(eaddr)-1;if(tb==0x7F)SEV else CLV |
0 | 762 SETNZ8(tb) SETBYTE(eaddr,tb)break; |
763 case 0x6B: break; /*ILLEGAL*/ | |
4 | 764 case 0x6C: /*INC indexed*/ tb=mem(eaddr)+1;if(tb==0x80)SEV else CLV |
0 | 765 SETNZ8(tb) SETBYTE(eaddr,tb)break; |
4 | 766 case 0x6D: /*TST indexed*/ tb=mem(eaddr);SETNZ8(tb) break; |
0 | 767 case 0x6E: /*JMP indexed*/ ipcreg=eaddr;break; |
768 case 0x6F: /*CLR indexed*/ SETBYTE(eaddr,0)CLN CLV SEZ CLC break; | |
4 | 769 case 0x70: /*NEG ext*/ EXTENDED tw=-mem(eaddr);SETSTATUS(0,mem(eaddr),tw) |
0 | 770 SETBYTE(eaddr,tw)break; |
771 case 0x71: break;/*ILLEGAL*/ | |
772 case 0x72: break;/*ILLEGAL*/ | |
4 | 773 case 0x73: /*COM ext*/ EXTENDED tb=~mem(eaddr);SETNZ8(tb);SEC CLV |
0 | 774 SETBYTE(eaddr,tb)break; |
4 | 775 case 0x74: /*LSR ext*/ EXTENDED tb=mem(eaddr);if(tb&0x01)SEC else CLC |
0 | 776 if(tb&0x10)SEH else CLH tb>>=1;SETNZ8(tb) |
777 SETBYTE(eaddr,tb)break; | |
778 case 0x75: break;/* ILLEGAL*/ | |
779 case 0x76: /*ROR ext*/ EXTENDED tb=(iccreg&0x01)<<7; | |
4 | 780 if(mem(eaddr)&0x01)SEC else CLC |
781 tw=(mem(eaddr)>>1)+tb;SETNZ8(tw) | |
0 | 782 SETBYTE(eaddr,tw) |
783 break; | |
4 | 784 case 0x77: /*ASR ext*/ EXTENDED tb=mem(eaddr);if(tb&0x01)SEC else CLC |
0 | 785 if(tb&0x10)SEH else CLH tb>>=1; |
786 if(tb&0x40)tb|=0x80;SETBYTE(eaddr,tb)SETNZ8(tb) | |
787 break; | |
4 | 788 case 0x78: /*ASL ext*/ EXTENDED tw=mem(eaddr)<<1; |
789 SETSTATUS(mem(eaddr),mem(eaddr),tw) | |
0 | 790 SETBYTE(eaddr,tw)break; |
4 | 791 case 0x79: /*ROL ext*/ EXTENDED tb=mem(eaddr);tw=iccreg&0x01; |
0 | 792 if(tb&0x80)SEC else CLC |
793 if((tb&0x80)^((tb<<1)&0x80))SEV else CLV | |
794 tb=(tb<<1)+tw;SETNZ8(tb) SETBYTE(eaddr,tb)break; | |
4 | 795 case 0x7A: /*DEC ext*/ EXTENDED tb=mem(eaddr)-1;if(tb==0x7F)SEV else CLV |
0 | 796 SETNZ8(tb) SETBYTE(eaddr,tb)break; |
797 case 0x7B: break; /*ILLEGAL*/ | |
4 | 798 case 0x7C: /*INC ext*/ EXTENDED tb=mem(eaddr)+1;if(tb==0x80)SEV else CLV |
0 | 799 SETNZ8(tb) SETBYTE(eaddr,tb)break; |
4 | 800 case 0x7D: /*TST ext*/ EXTENDED tb=mem(eaddr);SETNZ8(tb) break; |
0 | 801 case 0x7E: /*JMP ext*/ EXTENDED ipcreg=eaddr;break; |
802 case 0x7F: /*CLR ext*/ EXTENDED SETBYTE(eaddr,0)CLN CLV SEZ CLC break; | |
4 | 803 case 0x80: /*SUBA immediate*/ IMM8 tw=iareg-mem(eaddr); |
804 SETSTATUS(iareg,mem(eaddr),tw) | |
0 | 805 iareg=tw;break; |
4 | 806 case 0x81: /*CMPA immediate*/ IMM8 tw=iareg-mem(eaddr); |
807 SETSTATUS(iareg,mem(eaddr),tw) break; | |
808 case 0x82: /*SBCA immediate*/ IMM8 tw=iareg-mem(eaddr)-(iccreg&0x01); | |
809 SETSTATUS(iareg,mem(eaddr),tw) | |
0 | 810 iareg=tw;break; |
811 case 0x83: /*SUBD (CMPD CMPU) immediate*/ IMM16 | |
812 {unsigned long res,dreg,breg; | |
813 if(iflag==2)dreg=iureg;else dreg=GETDREG; | |
814 breg=GETWORD(eaddr); | |
815 res=dreg-breg; | |
816 SETSTATUSD(dreg,breg,res) | |
817 if(iflag==0) SETDREG(res) | |
818 }break; | |
4 | 819 case 0x84: /*ANDA immediate*/ IMM8 iareg=iareg&mem(eaddr);SETNZ8(iareg) |
0 | 820 CLV break; |
4 | 821 case 0x85: /*BITA immediate*/ IMM8 tb=iareg&mem(eaddr);SETNZ8(tb) |
0 | 822 CLV break; |
823 case 0x86: /*LDA immediate*/ IMM8 LOADAC(iareg) CLV SETNZ8(iareg) | |
824 break; | |
825 case 0x87: /*STA immediate (for the sake of orthogonality) */ IMM8 | |
826 SETNZ8(iareg) CLV STOREAC(iareg) break; | |
4 | 827 case 0x88: /*EORA immediate*/ IMM8 iareg=iareg^mem(eaddr);SETNZ8(iareg) |
0 | 828 CLV break; |
4 | 829 case 0x89: /*ADCA immediate*/ IMM8 tw=iareg+mem(eaddr)+(iccreg&0x01); |
830 SETSTATUS(iareg,mem(eaddr),tw) | |
0 | 831 iareg=tw;break; |
4 | 832 case 0x8A: /*ORA immediate*/ IMM8 iareg=iareg|mem(eaddr);SETNZ8(iareg) |
0 | 833 CLV break; |
4 | 834 case 0x8B: /*ADDA immediate*/ IMM8 tw=iareg+mem(eaddr); |
835 SETSTATUS(iareg,mem(eaddr),tw) | |
0 | 836 iareg=tw;break; |
837 case 0x8C: /*CMPX (CMPY CMPS) immediate */ IMM16 | |
838 {unsigned long dreg,breg,res; | |
839 if(iflag==0)dreg=ixreg;else if(iflag==1) | |
840 dreg=iyreg;else dreg=isreg;breg=GETWORD(eaddr); | |
841 res=dreg-breg; | |
842 SETSTATUSD(dreg,breg,res) | |
843 }break; | |
844 case 0x8D: /*BSR */ IMMBYTE(tb) PUSHWORD(ipcreg) ipcreg+=SIGNED(tb); | |
845 break; | |
846 case 0x8E: /* LDX (LDY) immediate */ IMM16 tw=GETWORD(eaddr); | |
847 CLV SETNZ16(tw) if(!iflag)ixreg=tw; else | |
848 iyreg=tw;break; | |
849 case 0x8F: /* STX (STY) immediate (orthogonality) */ IMM16 | |
850 if(!iflag) tw=ixreg; else tw=iyreg; | |
851 CLV SETNZ16(tw) SETWORD(eaddr,tw) break; | |
4 | 852 case 0x90: /*SUBA direct*/ DIRECT tw=iareg-mem(eaddr); |
853 SETSTATUS(iareg,mem(eaddr),tw) | |
0 | 854 iareg=tw;break; |
4 | 855 case 0x91: /*CMPA direct*/ DIRECT tw=iareg-mem(eaddr); |
856 SETSTATUS(iareg,mem(eaddr),tw) break; | |
857 case 0x92: /*SBCA direct*/ DIRECT tw=iareg-mem(eaddr)-(iccreg&0x01); | |
858 SETSTATUS(iareg,mem(eaddr),tw) | |
0 | 859 iareg=tw;break; |
860 case 0x93: /*SUBD (CMPD CMPU) direct*/ DIRECT | |
861 {unsigned long res,dreg,breg; | |
862 if(iflag==2)dreg=iureg;else dreg=GETDREG; | |
863 breg=GETWORD(eaddr); | |
864 res=dreg-breg; | |
865 SETSTATUSD(dreg,breg,res) | |
866 if(iflag==0) SETDREG(res) | |
867 }break; | |
4 | 868 case 0x94: /*ANDA direct*/ DIRECT iareg=iareg&mem(eaddr);SETNZ8(iareg) |
0 | 869 CLV break; |
4 | 870 case 0x95: /*BITA direct*/ DIRECT tb=iareg&mem(eaddr);SETNZ8(tb) |
0 | 871 CLV break; |
872 case 0x96: /*LDA direct*/ DIRECT LOADAC(iareg) CLV SETNZ8(iareg) | |
873 break; | |
874 case 0x97: /*STA direct */ DIRECT | |
875 SETNZ8(iareg) CLV STOREAC(iareg) break; | |
4 | 876 case 0x98: /*EORA direct*/ DIRECT iareg=iareg^mem(eaddr);SETNZ8(iareg) |
0 | 877 CLV break; |
4 | 878 case 0x99: /*ADCA direct*/ DIRECT tw=iareg+mem(eaddr)+(iccreg&0x01); |
879 SETSTATUS(iareg,mem(eaddr),tw) | |
0 | 880 iareg=tw;break; |
4 | 881 case 0x9A: /*ORA direct*/ DIRECT iareg=iareg|mem(eaddr);SETNZ8(iareg) |
0 | 882 CLV break; |
4 | 883 case 0x9B: /*ADDA direct*/ DIRECT tw=iareg+mem(eaddr); |
884 SETSTATUS(iareg,mem(eaddr),tw) | |
0 | 885 iareg=tw;break; |
886 case 0x9C: /*CMPX (CMPY CMPS) direct */ DIRECT | |
887 {unsigned long dreg,breg,res; | |
888 if(iflag==0)dreg=ixreg;else if(iflag==1) | |
889 dreg=iyreg;else dreg=isreg;breg=GETWORD(eaddr); | |
890 res=dreg-breg; | |
891 SETSTATUSD(dreg,breg,res) | |
892 }break; | |
893 case 0x9D: /*JSR direct */ DIRECT PUSHWORD(ipcreg) ipcreg=eaddr; | |
894 break; | |
895 case 0x9E: /* LDX (LDY) direct */ DIRECT tw=GETWORD(eaddr); | |
896 CLV SETNZ16(tw) if(!iflag)ixreg=tw; else | |
897 iyreg=tw;break; | |
898 case 0x9F: /* STX (STY) direct */ DIRECT | |
899 if(!iflag) tw=ixreg; else tw=iyreg; | |
900 CLV SETNZ16(tw) SETWORD(eaddr,tw) break; | |
4 | 901 case 0xA0: /*SUBA indexed*/ tw=iareg-mem(eaddr); |
902 SETSTATUS(iareg,mem(eaddr),tw) | |
0 | 903 iareg=tw;break; |
4 | 904 case 0xA1: /*CMPA indexed*/ tw=iareg-mem(eaddr); |
905 SETSTATUS(iareg,mem(eaddr),tw) break; | |
906 case 0xA2: /*SBCA indexed*/ tw=iareg-mem(eaddr)-(iccreg&0x01); | |
907 SETSTATUS(iareg,mem(eaddr),tw) | |
0 | 908 iareg=tw;break; |
909 case 0xA3: /*SUBD (CMPD CMPU) indexed*/ | |
910 {unsigned long res,dreg,breg; | |
911 if(iflag==2)dreg=iureg;else dreg=GETDREG; | |
912 breg=GETWORD(eaddr); | |
913 res=dreg-breg; | |
914 SETSTATUSD(dreg,breg,res) | |
915 if(iflag==0) SETDREG(res) | |
916 }break; | |
4 | 917 case 0xA4: /*ANDA indexed*/ iareg=iareg&mem(eaddr);SETNZ8(iareg) |
0 | 918 CLV break; |
4 | 919 case 0xA5: /*BITA indexed*/ tb=iareg&mem(eaddr);SETNZ8(tb) |
0 | 920 CLV break; |
921 case 0xA6: /*LDA indexed*/ LOADAC(iareg) CLV SETNZ8(iareg) | |
922 break; | |
923 case 0xA7: /*STA indexed */ | |
924 SETNZ8(iareg) CLV STOREAC(iareg) break; | |
4 | 925 case 0xA8: /*EORA indexed*/ iareg=iareg^mem(eaddr);SETNZ8(iareg) |
0 | 926 CLV break; |
4 | 927 case 0xA9: /*ADCA indexed*/ tw=iareg+mem(eaddr)+(iccreg&0x01); |
928 SETSTATUS(iareg,mem(eaddr),tw) | |
0 | 929 iareg=tw;break; |
4 | 930 case 0xAA: /*ORA indexed*/ iareg=iareg|mem(eaddr);SETNZ8(iareg) |
0 | 931 CLV break; |
4 | 932 case 0xAB: /*ADDA indexed*/ tw=iareg+mem(eaddr); |
933 SETSTATUS(iareg,mem(eaddr),tw) | |
0 | 934 iareg=tw;break; |
935 case 0xAC: /*CMPX (CMPY CMPS) indexed */ | |
936 {unsigned long dreg,breg,res; | |
937 if(iflag==0)dreg=ixreg;else if(iflag==1) | |
938 dreg=iyreg;else dreg=isreg;breg=GETWORD(eaddr); | |
939 res=dreg-breg; | |
940 SETSTATUSD(dreg,breg,res) | |
941 }break; | |
942 case 0xAD: /*JSR indexed */ PUSHWORD(ipcreg) ipcreg=eaddr; | |
943 break; | |
944 case 0xAE: /* LDX (LDY) indexed */ tw=GETWORD(eaddr); | |
945 CLV SETNZ16(tw) if(!iflag)ixreg=tw; else | |
946 iyreg=tw;break; | |
947 case 0xAF: /* STX (STY) indexed */ | |
948 if(!iflag) tw=ixreg; else tw=iyreg; | |
949 CLV SETNZ16(tw) SETWORD(eaddr,tw) break; | |
4 | 950 case 0xB0: /*SUBA ext*/ EXTENDED tw=iareg-mem(eaddr); |
951 SETSTATUS(iareg,mem(eaddr),tw) | |
0 | 952 iareg=tw;break; |
4 | 953 case 0xB1: /*CMPA ext*/ EXTENDED tw=iareg-mem(eaddr); |
954 SETSTATUS(iareg,mem(eaddr),tw) break; | |
955 case 0xB2: /*SBCA ext*/ EXTENDED tw=iareg-mem(eaddr)-(iccreg&0x01); | |
956 SETSTATUS(iareg,mem(eaddr),tw) | |
0 | 957 iareg=tw;break; |
958 case 0xB3: /*SUBD (CMPD CMPU) ext*/ EXTENDED | |
959 {unsigned long res,dreg,breg; | |
960 if(iflag==2)dreg=iureg;else dreg=GETDREG; | |
961 breg=GETWORD(eaddr); | |
962 res=dreg-breg; | |
963 SETSTATUSD(dreg,breg,res) | |
964 if(iflag==0) SETDREG(res) | |
965 }break; | |
4 | 966 case 0xB4: /*ANDA ext*/ EXTENDED iareg=iareg&mem(eaddr);SETNZ8(iareg) |
0 | 967 CLV break; |
4 | 968 case 0xB5: /*BITA ext*/ EXTENDED tb=iareg&mem(eaddr);SETNZ8(tb) |
0 | 969 CLV break; |
970 case 0xB6: /*LDA ext*/ EXTENDED LOADAC(iareg) CLV SETNZ8(iareg) | |
971 break; | |
972 case 0xB7: /*STA ext */ EXTENDED | |
973 SETNZ8(iareg) CLV STOREAC(iareg) break; | |
4 | 974 case 0xB8: /*EORA ext*/ EXTENDED iareg=iareg^mem(eaddr);SETNZ8(iareg) |
0 | 975 CLV break; |
4 | 976 case 0xB9: /*ADCA ext*/ EXTENDED tw=iareg+mem(eaddr)+(iccreg&0x01); |
977 SETSTATUS(iareg,mem(eaddr),tw) | |
0 | 978 iareg=tw;break; |
4 | 979 case 0xBA: /*ORA ext*/ EXTENDED iareg=iareg|mem(eaddr);SETNZ8(iareg) |
0 | 980 CLV break; |
4 | 981 case 0xBB: /*ADDA ext*/ EXTENDED tw=iareg+mem(eaddr); |
982 SETSTATUS(iareg,mem(eaddr),tw) | |
0 | 983 iareg=tw;break; |
984 case 0xBC: /*CMPX (CMPY CMPS) ext */ EXTENDED | |
985 {unsigned long dreg,breg,res; | |
986 if(iflag==0)dreg=ixreg;else if(iflag==1) | |
987 dreg=iyreg;else dreg=isreg;breg=GETWORD(eaddr); | |
988 res=dreg-breg; | |
989 SETSTATUSD(dreg,breg,res) | |
990 }break; | |
991 case 0xBD: /*JSR ext */ EXTENDED PUSHWORD(ipcreg) ipcreg=eaddr; | |
992 break; | |
993 case 0xBE: /* LDX (LDY) ext */ EXTENDED tw=GETWORD(eaddr); | |
994 CLV SETNZ16(tw) if(!iflag)ixreg=tw; else | |
995 iyreg=tw;break; | |
996 case 0xBF: /* STX (STY) ext */ EXTENDED | |
997 if(!iflag) tw=ixreg; else tw=iyreg; | |
998 CLV SETNZ16(tw) SETWORD(eaddr,tw) break; | |
4 | 999 case 0xC0: /*SUBB immediate*/ IMM8 tw=ibreg-mem(eaddr); |
1000 SETSTATUS(ibreg,mem(eaddr),tw) | |
0 | 1001 ibreg=tw;break; |
4 | 1002 case 0xC1: /*CMPB immediate*/ IMM8 tw=ibreg-mem(eaddr); |
1003 SETSTATUS(ibreg,mem(eaddr),tw) break; | |
1004 case 0xC2: /*SBCB immediate*/ IMM8 tw=ibreg-mem(eaddr)-(iccreg&0x01); | |
1005 SETSTATUS(ibreg,mem(eaddr),tw) | |
0 | 1006 ibreg=tw;break; |
1007 case 0xC3: /*ADDD immediate*/ IMM16 | |
1008 {unsigned long res,dreg,breg; | |
1009 dreg=GETDREG; | |
1010 breg=GETWORD(eaddr); | |
1011 res=dreg+breg; | |
1012 SETSTATUSD(dreg,breg,res) | |
1013 SETDREG(res) | |
1014 }break; | |
4 | 1015 case 0xC4: /*ANDB immediate*/ IMM8 ibreg=ibreg&mem(eaddr);SETNZ8(ibreg) |
0 | 1016 CLV break; |
4 | 1017 case 0xC5: /*BITB immediate*/ IMM8 tb=ibreg&mem(eaddr);SETNZ8(tb) |
0 | 1018 CLV break; |
1019 case 0xC6: /*LDB immediate*/ IMM8 LOADAC(ibreg) CLV SETNZ8(ibreg) | |
1020 break; | |
1021 case 0xC7: /*STB immediate (for the sake of orthogonality) */ IMM8 | |
1022 SETNZ8(ibreg) CLV STOREAC(ibreg) break; | |
4 | 1023 case 0xC8: /*EORB immediate*/ IMM8 ibreg=ibreg^mem(eaddr);SETNZ8(ibreg) |
0 | 1024 CLV break; |
4 | 1025 case 0xC9: /*ADCB immediate*/ IMM8 tw=ibreg+mem(eaddr)+(iccreg&0x01); |
1026 SETSTATUS(ibreg,mem(eaddr),tw) | |
0 | 1027 ibreg=tw;break; |
4 | 1028 case 0xCA: /*ORB immediate*/ IMM8 ibreg=ibreg|mem(eaddr);SETNZ8(ibreg) |
0 | 1029 CLV break; |
4 | 1030 case 0xCB: /*ADDB immediate*/ IMM8 tw=ibreg+mem(eaddr); |
1031 SETSTATUS(ibreg,mem(eaddr),tw) | |
0 | 1032 ibreg=tw;break; |
1033 case 0xCC: /*LDD immediate */ IMM16 tw=GETWORD(eaddr);SETNZ16(tw) | |
1034 CLV SETDREG(tw) break; | |
1035 case 0xCD: /*STD immediate (orthogonality) */ IMM16 | |
1036 tw=GETDREG; SETNZ16(tw) CLV | |
1037 SETWORD(eaddr,tw) break; | |
1038 case 0xCE: /* LDU (LDS) immediate */ IMM16 tw=GETWORD(eaddr); | |
1039 CLV SETNZ16(tw) if(!iflag)iureg=tw; else | |
1040 isreg=tw;break; | |
1041 case 0xCF: /* STU (STS) immediate (orthogonality) */ IMM16 | |
1042 if(!iflag) tw=iureg; else tw=isreg; | |
1043 CLV SETNZ16(tw) SETWORD(eaddr,tw) break; | |
4 | 1044 case 0xD0: /*SUBB direct*/ DIRECT tw=ibreg-mem(eaddr); |
1045 SETSTATUS(ibreg,mem(eaddr),tw) | |
0 | 1046 ibreg=tw;break; |
4 | 1047 case 0xD1: /*CMPB direct*/ DIRECT tw=ibreg-mem(eaddr); |
1048 SETSTATUS(ibreg,mem(eaddr),tw) break; | |
1049 case 0xD2: /*SBCB direct*/ DIRECT tw=ibreg-mem(eaddr)-(iccreg&0x01); | |
1050 SETSTATUS(ibreg,mem(eaddr),tw) | |
0 | 1051 ibreg=tw;break; |
1052 case 0xD3: /*ADDD direct*/ DIRECT | |
1053 {unsigned long res,dreg,breg; | |
1054 dreg=GETDREG; | |
1055 breg=GETWORD(eaddr); | |
1056 res=dreg+breg; | |
1057 SETSTATUSD(dreg,breg,res) | |
1058 SETDREG(res) | |
1059 }break; | |
4 | 1060 case 0xD4: /*ANDB direct*/ DIRECT ibreg=ibreg&mem(eaddr);SETNZ8(ibreg) |
0 | 1061 CLV break; |
4 | 1062 case 0xD5: /*BITB direct*/ DIRECT tb=ibreg&mem(eaddr);SETNZ8(tb) |
0 | 1063 CLV break; |
1064 case 0xD6: /*LDB direct*/ DIRECT LOADAC(ibreg) CLV SETNZ8(ibreg) | |
1065 break; | |
1066 case 0xD7: /*STB direct */ DIRECT | |
1067 SETNZ8(ibreg) CLV STOREAC(ibreg) break; | |
4 | 1068 case 0xD8: /*EORB direct*/ DIRECT ibreg=ibreg^mem(eaddr);SETNZ8(ibreg) |
0 | 1069 CLV break; |
4 | 1070 case 0xD9: /*ADCB direct*/ DIRECT tw=ibreg+mem(eaddr)+(iccreg&0x01); |
1071 SETSTATUS(ibreg,mem(eaddr),tw) | |
0 | 1072 ibreg=tw;break; |
4 | 1073 case 0xDA: /*ORB direct*/ DIRECT ibreg=ibreg|mem(eaddr);SETNZ8(ibreg) |
0 | 1074 CLV break; |
4 | 1075 case 0xDB: /*ADDB direct*/ DIRECT tw=ibreg+mem(eaddr); |
1076 SETSTATUS(ibreg,mem(eaddr),tw) | |
0 | 1077 ibreg=tw;break; |
1078 case 0xDC: /*LDD direct */ DIRECT tw=GETWORD(eaddr);SETNZ16(tw) | |
1079 CLV SETDREG(tw) break; | |
1080 case 0xDD: /*STD direct */ DIRECT | |
1081 tw=GETDREG; SETNZ16(tw) CLV | |
1082 SETWORD(eaddr,tw) break; | |
1083 case 0xDE: /* LDU (LDS) direct */ DIRECT tw=GETWORD(eaddr); | |
1084 CLV SETNZ16(tw) if(!iflag)iureg=tw; else | |
1085 isreg=tw;break; | |
1086 case 0xDF: /* STU (STS) direct */ DIRECT | |
1087 if(!iflag) tw=iureg; else tw=isreg; | |
1088 CLV SETNZ16(tw) SETWORD(eaddr,tw) break; | |
4 | 1089 case 0xE0: /*SUBB indexed*/ tw=ibreg-mem(eaddr); |
1090 SETSTATUS(ibreg,mem(eaddr),tw) | |
0 | 1091 ibreg=tw;break; |
4 | 1092 case 0xE1: /*CMPB indexed*/ tw=ibreg-mem(eaddr); |
1093 SETSTATUS(ibreg,mem(eaddr),tw) break; | |
1094 case 0xE2: /*SBCB indexed*/ tw=ibreg-mem(eaddr)-(iccreg&0x01); | |
1095 SETSTATUS(ibreg,mem(eaddr),tw) | |
0 | 1096 ibreg=tw;break; |
1097 case 0xE3: /*ADDD indexed*/ | |
1098 {unsigned long res,dreg,breg; | |
1099 dreg=GETDREG; | |
1100 breg=GETWORD(eaddr); | |
1101 res=dreg+breg; | |
1102 SETSTATUSD(dreg,breg,res) | |
1103 SETDREG(res) | |
1104 }break; | |
4 | 1105 case 0xE4: /*ANDB indexed*/ ibreg=ibreg&mem(eaddr);SETNZ8(ibreg) |
0 | 1106 CLV break; |
4 | 1107 case 0xE5: /*BITB indexed*/ tb=ibreg&mem(eaddr);SETNZ8(tb) |
0 | 1108 CLV break; |
1109 case 0xE6: /*LDB indexed*/ LOADAC(ibreg) CLV SETNZ8(ibreg) | |
1110 break; | |
1111 case 0xE7: /*STB indexed */ | |
1112 SETNZ8(ibreg) CLV STOREAC(ibreg) break; | |
4 | 1113 case 0xE8: /*EORB indexed*/ ibreg=ibreg^mem(eaddr);SETNZ8(ibreg) |
0 | 1114 CLV break; |
4 | 1115 case 0xE9: /*ADCB indexed*/ tw=ibreg+mem(eaddr)+(iccreg&0x01); |
1116 SETSTATUS(ibreg,mem(eaddr),tw) | |
0 | 1117 ibreg=tw;break; |
4 | 1118 case 0xEA: /*ORB indexed*/ ibreg=ibreg|mem(eaddr);SETNZ8(ibreg) |
0 | 1119 CLV break; |
4 | 1120 case 0xEB: /*ADDB indexed*/ tw=ibreg+mem(eaddr); |
1121 SETSTATUS(ibreg,mem(eaddr),tw) | |
0 | 1122 ibreg=tw;break; |
1123 case 0xEC: /*LDD indexed */ tw=GETWORD(eaddr);SETNZ16(tw) | |
1124 CLV SETDREG(tw) break; | |
1125 case 0xED: /*STD indexed */ | |
1126 tw=GETDREG; SETNZ16(tw) CLV | |
1127 SETWORD(eaddr,tw) break; | |
1128 case 0xEE: /* LDU (LDS) indexed */ tw=GETWORD(eaddr); | |
1129 CLV SETNZ16(tw) if(!iflag)iureg=tw; else | |
1130 isreg=tw;break; | |
1131 case 0xEF: /* STU (STS) indexed */ | |
1132 if(!iflag) tw=iureg; else tw=isreg; | |
1133 CLV SETNZ16(tw) SETWORD(eaddr,tw) break; | |
4 | 1134 case 0xF0: /*SUBB ext*/ EXTENDED tw=ibreg-mem(eaddr); |
1135 SETSTATUS(ibreg,mem(eaddr),tw) | |
0 | 1136 ibreg=tw;break; |
4 | 1137 case 0xF1: /*CMPB ext*/ EXTENDED tw=ibreg-mem(eaddr); |
1138 SETSTATUS(ibreg,mem(eaddr),tw) break; | |
1139 case 0xF2: /*SBCB ext*/ EXTENDED tw=ibreg-mem(eaddr)-(iccreg&0x01); | |
1140 SETSTATUS(ibreg,mem(eaddr),tw) | |
0 | 1141 ibreg=tw;break; |
1142 case 0xF3: /*ADDD ext*/ EXTENDED | |
1143 {unsigned long res,dreg,breg; | |
1144 dreg=GETDREG; | |
1145 breg=GETWORD(eaddr); | |
1146 res=dreg+breg; | |
1147 SETSTATUSD(dreg,breg,res) | |
1148 SETDREG(res) | |
1149 }break; | |
4 | 1150 case 0xF4: /*ANDB ext*/ EXTENDED ibreg=ibreg&mem(eaddr);SETNZ8(ibreg) |
0 | 1151 CLV break; |
4 | 1152 case 0xF5: /*BITB ext*/ EXTENDED tb=ibreg&mem(eaddr);SETNZ8(tb) |
0 | 1153 CLV break; |
1154 case 0xF6: /*LDB ext*/ EXTENDED LOADAC(ibreg) CLV SETNZ8(ibreg) | |
1155 break; | |
1156 case 0xF7: /*STB ext */ EXTENDED | |
1157 SETNZ8(ibreg) CLV STOREAC(ibreg) break; | |
4 | 1158 case 0xF8: /*EORB ext*/ EXTENDED ibreg=ibreg^mem(eaddr);SETNZ8(ibreg) |
0 | 1159 CLV break; |
4 | 1160 case 0xF9: /*ADCB ext*/ EXTENDED tw=ibreg+mem(eaddr)+(iccreg&0x01); |
1161 SETSTATUS(ibreg,mem(eaddr),tw) | |
0 | 1162 ibreg=tw;break; |
4 | 1163 case 0xFA: /*ORB ext*/ EXTENDED ibreg=ibreg|mem(eaddr);SETNZ8(ibreg) |
0 | 1164 CLV break; |
4 | 1165 case 0xFB: /*ADDB ext*/ EXTENDED tw=ibreg+mem(eaddr); |
1166 SETSTATUS(ibreg,mem(eaddr),tw) | |
0 | 1167 ibreg=tw;break; |
1168 case 0xFC: /*LDD ext */ EXTENDED tw=GETWORD(eaddr);SETNZ16(tw) | |
1169 CLV SETDREG(tw) break; | |
1170 case 0xFD: /*STD ext */ EXTENDED | |
1171 tw=GETDREG; SETNZ16(tw) CLV | |
1172 SETWORD(eaddr,tw) break; | |
1173 case 0xFE: /* LDU (LDS) ext */ EXTENDED tw=GETWORD(eaddr); | |
1174 CLV SETNZ16(tw) if(!iflag)iureg=tw; else | |
1175 isreg=tw;break; | |
1176 case 0xFF: /* STU (STS) ext */ EXTENDED | |
1177 if(!iflag) tw=iureg; else tw=isreg; | |
1178 CLV SETNZ16(tw) SETWORD(eaddr,tw) break; | |
1179 | |
1180 | |
1181 } | |
1182 } | |
1183 } | |
1184 |