Mercurial > hg > CbC > CbC_gcc
annotate gcc/config/pdp11/pdp11.h @ 111:04ced10e8804
gcc 7
| author | kono |
|---|---|
| date | Fri, 27 Oct 2017 22:46:09 +0900 |
| parents | f6334be47118 |
| children | 84e7813d76e9 |
| rev | line source |
|---|---|
| 0 | 1 /* Definitions of target machine for GNU compiler, for the pdp-11 |
| 111 | 2 Copyright (C) 1994-2017 Free Software Foundation, Inc. |
| 0 | 3 Contributed by Michael K. Gschwind (mike@vlsivie.tuwien.ac.at). |
| 4 | |
| 5 This file is part of GCC. | |
| 6 | |
| 7 GCC is free software; you can redistribute it and/or modify | |
| 8 it under the terms of the GNU General Public License as published by | |
| 9 the Free Software Foundation; either version 3, or (at your option) | |
| 10 any later version. | |
| 11 | |
| 12 GCC is distributed in the hope that it will be useful, | |
| 13 but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 15 GNU General Public License for more details. | |
| 16 | |
| 17 You should have received a copy of the GNU General Public License | |
| 18 along with GCC; see the file COPYING3. If not see | |
| 19 <http://www.gnu.org/licenses/>. */ | |
| 20 | |
| 21 #define CONSTANT_POOL_BEFORE_FUNCTION 0 | |
| 22 | |
| 23 /* check whether load_fpu_reg or not */ | |
|
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24 #define LOAD_FPU_REG_P(x) ((x) >= AC0_REGNUM && (x) <= AC3_REGNUM) |
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25 #define NO_LOAD_FPU_REG_P(x) ((x) == AC4_REGNUM || (x) == AC5_REGNUM) |
| 0 | 26 #define FPU_REG_P(x) (LOAD_FPU_REG_P(x) || NO_LOAD_FPU_REG_P(x)) |
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27 #define CPU_REG_P(x) ((x) <= PC_REGNUM) |
| 0 | 28 |
| 29 /* Names to predefine in the preprocessor for this target machine. */ | |
| 30 | |
| 31 #define TARGET_CPU_CPP_BUILTINS() \ | |
| 32 do \ | |
| 33 { \ | |
| 34 builtin_define_std ("pdp11"); \ | |
| 35 } \ | |
| 36 while (0) | |
| 37 | |
| 38 | |
| 39 /* Generate DBX debugging information. */ | |
| 40 | |
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41 #define DBX_DEBUGGING_INFO |
| 0 | 42 |
| 43 #define TARGET_40_PLUS (TARGET_40 || TARGET_45) | |
| 44 #define TARGET_10 (! TARGET_40_PLUS) | |
| 45 | |
| 46 #define TARGET_UNIX_ASM_DEFAULT 0 | |
| 47 | |
| 48 #define ASSEMBLER_DIALECT (TARGET_UNIX_ASM ? 1 : 0) | |
| 49 | |
| 50 | |
| 51 | |
| 52 /* TYPE SIZES */ | |
| 53 #define SHORT_TYPE_SIZE 16 | |
| 54 #define INT_TYPE_SIZE (TARGET_INT16 ? 16 : 32) | |
| 55 #define LONG_TYPE_SIZE 32 | |
| 56 #define LONG_LONG_TYPE_SIZE 64 | |
| 57 | |
| 58 /* if we set FLOAT_TYPE_SIZE to 32, we could have the benefit | |
| 59 of saving core for huge arrays - the definitions are | |
| 60 already in md - but floats can never reside in | |
| 61 an FPU register - we keep the FPU in double float mode | |
| 62 all the time !! */ | |
| 63 #define FLOAT_TYPE_SIZE (TARGET_FLOAT32 ? 32 : 64) | |
| 64 #define DOUBLE_TYPE_SIZE 64 | |
| 65 #define LONG_DOUBLE_TYPE_SIZE 64 | |
| 66 | |
| 67 /* machine types from ansi */ | |
| 68 #define SIZE_TYPE "unsigned int" /* definition of size_t */ | |
| 69 #define WCHAR_TYPE "int" /* or long int???? */ | |
| 70 #define WCHAR_TYPE_SIZE 16 | |
| 71 | |
| 72 #define PTRDIFF_TYPE "int" | |
| 73 | |
| 74 /* target machine storage layout */ | |
| 75 | |
| 76 /* Define this if most significant bit is lowest numbered | |
| 77 in instructions that operate on numbered bit-fields. */ | |
| 78 #define BITS_BIG_ENDIAN 0 | |
| 79 | |
| 80 /* Define this if most significant byte of a word is the lowest numbered. */ | |
| 81 #define BYTES_BIG_ENDIAN 0 | |
| 82 | |
| 83 /* Define this if most significant word of a multiword number is first. */ | |
| 84 #define WORDS_BIG_ENDIAN 1 | |
| 85 | |
| 86 /* Define that floats are in VAX order, not high word first as for ints. */ | |
| 87 #define FLOAT_WORDS_BIG_ENDIAN 0 | |
| 88 | |
| 89 /* Width of a word, in units (bytes). | |
| 90 | |
| 91 UNITS OR BYTES - seems like units */ | |
| 92 #define UNITS_PER_WORD 2 | |
| 93 | |
| 94 /* This machine doesn't use IEEE floats. */ | |
| 95 /* Because the pdp11 (at least Unix) convention for 32-bit ints is | |
| 96 big endian, opposite for what you need for float, the vax float | |
| 97 conversion routines aren't actually used directly. But the underlying | |
| 98 format is indeed the vax/pdp11 float format. */ | |
| 99 extern const struct real_format pdp11_f_format; | |
| 100 extern const struct real_format pdp11_d_format; | |
| 101 | |
| 102 /* Maximum sized of reasonable data type | |
| 103 DImode or Dfmode ...*/ | |
| 104 #define MAX_FIXED_MODE_SIZE 64 | |
| 105 | |
| 106 /* Allocation boundary (in *bits*) for storing pointers in memory. */ | |
| 107 #define POINTER_BOUNDARY 16 | |
| 108 | |
| 109 /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
| 110 #define PARM_BOUNDARY 16 | |
| 111 | |
| 112 /* Boundary (in *bits*) on which stack pointer should be aligned. */ | |
| 113 #define STACK_BOUNDARY 16 | |
| 114 | |
| 115 /* Allocation boundary (in *bits*) for the code of a function. */ | |
| 116 #define FUNCTION_BOUNDARY 16 | |
| 117 | |
| 118 /* Alignment of field after `int : 0' in a structure. */ | |
| 119 #define EMPTY_FIELD_BOUNDARY 16 | |
| 120 | |
| 121 /* No data type wants to be aligned rounder than this. */ | |
| 122 #define BIGGEST_ALIGNMENT 16 | |
| 123 | |
| 124 /* Define this if move instructions will actually fail to work | |
| 125 when given unaligned data. */ | |
| 126 #define STRICT_ALIGNMENT 1 | |
| 127 | |
| 128 /* Standard register usage. */ | |
| 129 | |
| 130 /* Number of actual hardware registers. | |
| 131 The hardware registers are assigned numbers for the compiler | |
| 132 from 0 to just below FIRST_PSEUDO_REGISTER. | |
| 133 All registers that the compiler knows about must be given numbers, | |
| 134 even those that are not normally considered general registers. | |
| 135 | |
| 136 we have 8 integer registers, plus 6 float | |
| 137 (don't use scratch float !) */ | |
| 138 | |
| 139 /* 1 for registers that have pervasive standard uses | |
| 140 and are not available for the register allocator. | |
| 141 | |
| 142 On the pdp, these are: | |
| 143 Reg 7 = pc; | |
| 144 reg 6 = sp; | |
| 145 reg 5 = fp; not necessarily! | |
| 146 */ | |
| 147 | |
| 148 #define FIXED_REGISTERS \ | |
| 149 {0, 0, 0, 0, 0, 0, 1, 1, \ | |
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150 0, 0, 0, 0, 0, 0, 1, 1 } |
| 0 | 151 |
| 152 | |
| 153 | |
| 154 /* 1 for registers not available across function calls. | |
| 155 These must include the FIXED_REGISTERS and also any | |
| 156 registers that can be used without being saved. | |
| 157 The latter must include the registers where values are returned | |
| 158 and the register where structure-value addresses are passed. | |
| 159 Aside from that, you can include as many other registers as you like. */ | |
| 160 | |
| 161 /* don't know about fp */ | |
| 162 #define CALL_USED_REGISTERS \ | |
| 163 {1, 1, 0, 0, 0, 0, 1, 1, \ | |
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164 0, 0, 0, 0, 0, 0, 1, 1 } |
| 0 | 165 |
| 166 | |
| 167 /* Specify the registers used for certain standard purposes. | |
| 168 The values of these macros are register numbers. */ | |
| 169 | |
| 170 /* Register in which static-chain is passed to a function. */ | |
| 171 /* ??? - i don't want to give up a reg for this! */ | |
| 172 #define STATIC_CHAIN_REGNUM 4 | |
| 173 | |
| 174 /* Define the classes of registers for register constraints in the | |
| 175 machine description. Also define ranges of constants. | |
| 176 | |
| 177 One of the classes must always be named ALL_REGS and include all hard regs. | |
| 178 If there is more than one class, another class must be named NO_REGS | |
| 179 and contain no registers. | |
| 180 | |
| 181 The name GENERAL_REGS must be the name of a class (or an alias for | |
| 182 another name such as ALL_REGS). This is the class of registers | |
| 183 that is allowed by "g" or "r" in a register constraint. | |
| 184 Also, registers outside this class are allocated only when | |
| 185 instructions express preferences for them. | |
| 186 | |
| 187 The classes must be numbered in nondecreasing order; that is, | |
| 188 a larger-numbered class must never be contained completely | |
| 189 in a smaller-numbered class. | |
| 190 | |
| 191 For any two classes, it is very desirable that there be another | |
| 192 class that represents their union. */ | |
| 193 | |
| 194 /* The pdp has a couple of classes: | |
| 195 | |
| 196 MUL_REGS are used for odd numbered regs, to use in 16-bit multiplication | |
| 197 (even numbered do 32-bit multiply) | |
| 198 LMUL_REGS long multiply registers (even numbered regs ) | |
| 199 (don't need them, all 32-bit regs are even numbered!) | |
| 200 GENERAL_REGS is all cpu | |
| 201 LOAD_FPU_REGS is the first four cpu regs, they are easier to load | |
| 202 NO_LOAD_FPU_REGS is ac4 and ac5, currently - difficult to load them | |
| 203 FPU_REGS is all fpu regs | |
| 204 */ | |
| 205 | |
| 206 enum reg_class { NO_REGS, MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS, FPU_REGS, ALL_REGS, LIM_REG_CLASSES }; | |
| 207 | |
| 208 #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
| 209 | |
| 210 /* have to allow this till cmpsi/tstsi are fixed in a better way !! */ | |
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211 #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true |
| 0 | 212 |
| 213 /* Since GENERAL_REGS is the same class as ALL_REGS, | |
| 214 don't give it a different class number; just make it an alias. */ | |
| 215 | |
| 216 /* #define GENERAL_REGS ALL_REGS */ | |
| 217 | |
| 218 /* Give names of register classes as strings for dump file. */ | |
| 219 | |
| 220 #define REG_CLASS_NAMES {"NO_REGS", "MUL_REGS", "GENERAL_REGS", "LOAD_FPU_REGS", "NO_LOAD_FPU_REGS", "FPU_REGS", "ALL_REGS" } | |
| 221 | |
| 222 /* Define which registers fit in which classes. | |
| 223 This is an initializer for a vector of HARD_REG_SET | |
| 224 of length N_REG_CLASSES. */ | |
| 225 | |
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226 #define REG_CLASS_CONTENTS {{0}, {0x00aa}, {0xc0ff}, {0x0f00}, {0x3000}, {0x3f00}, {0xffff}} |
| 0 | 227 |
| 228 /* The same information, inverted: | |
| 229 Return the class number of the smallest class containing | |
| 230 reg number REGNO. This could be a conditional expression | |
| 231 or could index an array. */ | |
| 232 | |
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233 #define REGNO_REG_CLASS(REGNO) pdp11_regno_reg_class (REGNO) |
| 0 | 234 |
| 235 /* The class value for index registers, and the one for base regs. */ | |
| 236 #define INDEX_REG_CLASS GENERAL_REGS | |
| 237 #define BASE_REG_CLASS GENERAL_REGS | |
| 238 | |
| 239 /* Return the maximum number of consecutive registers | |
| 240 needed to represent mode MODE in a register of class CLASS. */ | |
| 241 #define CLASS_MAX_NREGS(CLASS, MODE) \ | |
| 242 ((CLASS == GENERAL_REGS || CLASS == MUL_REGS)? \ | |
| 243 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD): \ | |
| 244 1 \ | |
| 245 ) | |
| 246 | |
| 247 /* Stack layout; function entry, exit and calling. */ | |
| 248 | |
| 249 /* Define this if pushing a word on the stack | |
| 250 makes the stack pointer a smaller address. */ | |
| 111 | 251 #define STACK_GROWS_DOWNWARD 1 |
| 0 | 252 |
| 253 /* Define this to nonzero if the nominal address of the stack frame | |
| 254 is at the high-address end of the local variables; | |
| 255 that is, each additional local variable allocated | |
| 256 goes at a more negative offset in the frame. | |
| 257 */ | |
| 258 #define FRAME_GROWS_DOWNWARD 1 | |
| 259 | |
| 260 /* If we generate an insn to push BYTES bytes, | |
| 261 this says how many the stack pointer really advances by. | |
| 262 On the pdp11, the stack is on an even boundary */ | |
| 263 #define PUSH_ROUNDING(BYTES) ((BYTES + 1) & ~1) | |
| 264 | |
| 265 /* current_first_parm_offset stores the # of registers pushed on the | |
| 266 stack */ | |
| 267 extern int current_first_parm_offset; | |
| 268 | |
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269 /* Offset of first parameter from the argument pointer register value. */ |
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270 #define FIRST_PARM_OFFSET(FNDECL) 0 |
| 0 | 271 |
| 272 /* Define how to find the value returned by a function. | |
| 273 VALTYPE is the data type of the value (as a tree). | |
| 274 If the precise function being called is known, FUNC is its FUNCTION_DECL; | |
| 275 otherwise, FUNC is 0. */ | |
| 276 #define BASE_RETURN_VALUE_REG(MODE) \ | |
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277 (FLOAT_MODE_P (MODE) ? AC0_REGNUM : RETVAL_REGNUM) |
| 0 | 278 |
| 279 /* 1 if N is a possible register number for function argument passing. | |
| 280 - not used on pdp */ | |
| 281 | |
| 282 #define FUNCTION_ARG_REGNO_P(N) 0 | |
| 283 | |
| 284 /* Define a data type for recording info about an argument list | |
| 285 during the scan of that argument list. This data type should | |
| 286 hold all necessary information about the function itself | |
| 287 and about the args processed so far, enough to enable macros | |
| 288 such as FUNCTION_ARG to determine where the next arg should go. | |
| 289 | |
| 290 */ | |
| 291 | |
| 292 #define CUMULATIVE_ARGS int | |
| 293 | |
| 294 /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
| 295 for a call to a function whose data type is FNTYPE. | |
| 296 For a library call, FNTYPE is 0. | |
| 297 | |
| 298 ...., the offset normally starts at 0, but starts at 1 word | |
| 299 when the function gets a structure-value-address as an | |
| 300 invisible first argument. */ | |
| 301 | |
| 302 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \ | |
| 303 ((CUM) = 0) | |
| 304 | |
| 305 /* Output assembler code to FILE to increment profiler label # LABELNO | |
| 306 for profiling a function entry. */ | |
| 307 | |
| 308 #define FUNCTION_PROFILER(FILE, LABELNO) \ | |
| 309 gcc_unreachable (); | |
| 310 | |
| 311 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, | |
| 312 the stack pointer does not matter. The value is tested only in | |
| 313 functions that have frame pointers. | |
| 314 No definition is equivalent to always zero. */ | |
| 315 | |
| 316 extern int may_call_alloca; | |
| 317 | |
| 318 #define EXIT_IGNORE_STACK 1 | |
| 319 | |
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320 /* Definitions for register eliminations. |
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321 |
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322 This is an array of structures. Each structure initializes one pair |
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323 of eliminable registers. The "from" register number is given first, |
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324 followed by "to". Eliminations of the same "from" register are listed |
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325 in order of preference. |
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326 |
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327 There are two registers that can always be eliminated on the pdp11. |
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328 The frame pointer and the arg pointer can be replaced by either the |
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329 hard frame pointer or to the stack pointer, depending upon the |
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330 circumstances. The hard frame pointer is not used before reload and |
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331 so it is not eligible for elimination. */ |
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332 |
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333 #define ELIMINABLE_REGS \ |
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334 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ |
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335 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \ |
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336 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ |
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337 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}} \ |
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338 |
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339 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ |
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340 ((OFFSET) = pdp11_initial_elimination_offset ((FROM), (TO))) |
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341 |
| 0 | 342 |
| 343 /* Addressing modes, and classification of registers for them. */ | |
| 344 | |
| 345 #define HAVE_POST_INCREMENT 1 | |
| 346 | |
| 347 #define HAVE_PRE_DECREMENT 1 | |
| 348 | |
| 349 /* Macros to check register numbers against specific register classes. */ | |
| 350 | |
| 351 /* These assume that REGNO is a hard or pseudo reg number. | |
| 352 They give nonzero only if REGNO is a hard reg of the suitable class | |
| 353 or a pseudo reg currently allocated to a suitable hard reg. | |
| 354 Since they use reg_renumber, they are safe only once reg_renumber | |
| 111 | 355 has been allocated, which happens in reginfo.c during register |
| 356 allocation. */ | |
| 0 | 357 |
| 358 #define REGNO_OK_FOR_BASE_P(REGNO) \ | |
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359 ((REGNO) <= PC_REGNUM || (unsigned) reg_renumber[REGNO] <= PC_REGNUM || \ |
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360 (REGNO) == ARG_POINTER_REGNUM || (REGNO) == FRAME_POINTER_REGNUM) |
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361 |
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362 #define REGNO_OK_FOR_INDEX_P(REGNO) REGNO_OK_FOR_BASE_P (REGNO) |
| 0 | 363 |
| 364 /* Now macros that check whether X is a register and also, | |
| 365 strictly, whether it is in a specified class. | |
| 366 */ | |
| 367 | |
| 368 | |
| 369 | |
| 370 /* Maximum number of registers that can appear in a valid memory address. */ | |
| 371 | |
| 372 #define MAX_REGS_PER_ADDRESS 1 | |
| 373 | |
| 374 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx | |
| 375 and check its validity for a certain class. | |
| 376 We have two alternate definitions for each of them. | |
| 377 The usual definition accepts all pseudo regs; the other rejects | |
| 378 them unless they have been allocated suitable hard regs. | |
| 379 The symbol REG_OK_STRICT causes the latter definition to be used. | |
| 380 | |
| 381 Most source files want to accept pseudo regs in the hope that | |
| 382 they will get allocated to the class that the insn wants them to be in. | |
| 383 Source files for reload pass need to be strict. | |
| 384 After reload, it makes no difference, since pseudo regs have | |
| 385 been eliminated by then. */ | |
| 386 | |
| 387 #ifndef REG_OK_STRICT | |
| 388 | |
| 389 /* Nonzero if X is a hard reg that can be used as an index | |
| 390 or if it is a pseudo reg. */ | |
| 391 #define REG_OK_FOR_INDEX_P(X) (1) | |
| 392 /* Nonzero if X is a hard reg that can be used as a base reg | |
| 393 or if it is a pseudo reg. */ | |
| 394 #define REG_OK_FOR_BASE_P(X) (1) | |
| 395 | |
| 396 #else | |
| 397 | |
| 398 /* Nonzero if X is a hard reg that can be used as an index. */ | |
| 399 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) | |
| 400 /* Nonzero if X is a hard reg that can be used as a base reg. */ | |
| 401 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) | |
| 402 | |
| 403 #endif | |
| 404 | |
| 405 /* Specify the machine mode that this machine uses | |
| 406 for the index in the tablejump instruction. */ | |
| 407 #define CASE_VECTOR_MODE HImode | |
| 408 | |
| 409 /* Define this if a raw index is all that is needed for a | |
| 410 `tablejump' insn. */ | |
| 411 #define CASE_TAKES_INDEX_RAW | |
| 412 | |
| 413 /* Define this as 1 if `char' should by default be signed; else as 0. */ | |
| 414 #define DEFAULT_SIGNED_CHAR 1 | |
| 415 | |
| 416 /* Max number of bytes we can move from memory to memory | |
| 417 in one reasonably fast instruction. | |
| 418 */ | |
| 419 | |
| 420 #define MOVE_MAX 2 | |
| 421 | |
| 422 /* Nonzero if access to memory by byte is slow and undesirable. - | |
| 423 */ | |
| 424 #define SLOW_BYTE_ACCESS 0 | |
| 425 | |
| 426 /* Do not break .stabs pseudos into continuations. */ | |
| 427 #define DBX_CONTIN_LENGTH 0 | |
| 428 | |
| 429 /* Give a comparison code (EQ, NE etc) and the first operand of a COMPARE, | |
| 430 return the mode to be used for the comparison. For floating-point, CCFPmode | |
| 431 should be used. */ | |
| 432 | |
| 433 #define SELECT_CC_MODE(OP,X,Y) \ | |
| 434 (GET_MODE_CLASS(GET_MODE(X)) == MODE_FLOAT? CCFPmode : CCmode) | |
| 435 | |
| 436 /* Specify the machine mode that pointers have. | |
| 437 After generation of rtl, the compiler makes no further distinction | |
| 438 between pointers and any other objects of this machine mode. */ | |
| 439 #define Pmode HImode | |
| 440 | |
| 441 /* A function address in a call instruction | |
| 442 is a word address (for indexing purposes) | |
| 443 so give the MEM rtx a word's mode. */ | |
| 444 #define FUNCTION_MODE HImode | |
| 445 | |
| 446 /* Define this if addresses of constant functions | |
| 447 shouldn't be put through pseudo regs where they can be cse'd. | |
| 448 Desirable on machines where ordinary constants are expensive | |
| 449 but a CALL with constant address is cheap. */ | |
| 450 /* #define NO_FUNCTION_CSE */ | |
| 451 | |
| 452 | |
| 453 /* Tell emit-rtl.c how to initialize special values on a per-function base. */ | |
| 111 | 454 extern rtx cc0_reg_rtx; |
| 0 | 455 |
| 456 #define CC_STATUS_MDEP rtx | |
| 457 | |
| 458 #define CC_STATUS_MDEP_INIT (cc_status.mdep = 0) | |
| 459 | |
| 460 /* Tell final.c how to eliminate redundant test instructions. */ | |
| 461 | |
| 462 /* Here we define machine-dependent flags and fields in cc_status | |
| 463 (see `conditions.h'). */ | |
| 464 | |
| 465 #define CC_IN_FPU 04000 | |
| 466 | |
| 467 /* Do UPDATE_CC if EXP is a set, used in | |
| 468 NOTICE_UPDATE_CC | |
| 469 | |
| 470 floats only do compare correctly, else nullify ... | |
| 471 | |
| 472 get cc0 out soon ... | |
| 473 */ | |
| 474 | |
| 475 /* Store in cc_status the expressions | |
| 476 that the condition codes will describe | |
| 477 after execution of an instruction whose pattern is EXP. | |
| 478 Do not alter them if the instruction would not alter the cc's. */ | |
| 479 | |
| 480 #define NOTICE_UPDATE_CC(EXP, INSN) \ | |
| 481 { if (GET_CODE (EXP) == SET) \ | |
| 482 { \ | |
| 483 notice_update_cc_on_set(EXP, INSN); \ | |
| 484 } \ | |
| 485 else if (GET_CODE (EXP) == PARALLEL \ | |
| 486 && GET_CODE (XVECEXP (EXP, 0, 0)) == SET) \ | |
| 487 { \ | |
| 488 notice_update_cc_on_set(XVECEXP (EXP, 0, 0), INSN); \ | |
| 489 } \ | |
| 490 else if (GET_CODE (EXP) == CALL) \ | |
| 491 { /* all bets are off */ CC_STATUS_INIT; } \ | |
| 492 if (cc_status.value1 && GET_CODE (cc_status.value1) == REG \ | |
| 493 && cc_status.value2 \ | |
| 494 && reg_overlap_mentioned_p (cc_status.value1, cc_status.value2)) \ | |
| 495 { \ | |
| 496 printf ("here!\n"); \ | |
| 497 cc_status.value2 = 0; \ | |
| 498 } \ | |
| 499 } | |
| 500 | |
| 501 /* Control the assembler format that we output. */ | |
| 502 | |
| 503 /* Output to assembler file text saying following lines | |
| 504 may contain character constants, extra white space, comments, etc. */ | |
| 505 | |
| 506 #define ASM_APP_ON "" | |
| 507 | |
| 508 /* Output to assembler file text saying following lines | |
| 509 no longer contain unusual constructs. */ | |
| 510 | |
| 511 #define ASM_APP_OFF "" | |
| 512 | |
| 513 /* Output before read-only data. */ | |
| 514 | |
| 515 #define TEXT_SECTION_ASM_OP "\t.text\n" | |
| 516 | |
| 517 /* Output before writable data. */ | |
| 518 | |
| 519 #define DATA_SECTION_ASM_OP "\t.data\n" | |
| 520 | |
| 521 /* How to refer to registers in assembler output. | |
| 522 This sequence is indexed by compiler's hard-register-number (see above). */ | |
| 523 | |
| 524 #define REGISTER_NAMES \ | |
| 525 {"r0", "r1", "r2", "r3", "r4", "r5", "sp", "pc", \ | |
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526 "ac0", "ac1", "ac2", "ac3", "ac4", "ac5", "fp", "ap" } |
| 0 | 527 |
| 528 /* Globalizing directive for a label. */ | |
| 529 #define GLOBAL_ASM_OP "\t.globl " | |
| 530 | |
| 531 /* The prefix to add to user-visible assembler symbols. */ | |
| 532 | |
| 533 #define USER_LABEL_PREFIX "_" | |
| 534 | |
| 535 /* This is how to store into the string LABEL | |
| 536 the symbol_ref name of an internal numbered label where | |
| 537 PREFIX is the class of label and NUM is the number within the class. | |
| 538 This is suitable for output with `assemble_name'. */ | |
| 539 | |
| 540 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ | |
| 541 sprintf (LABEL, "*%s_%lu", PREFIX, (unsigned long)(NUM)) | |
| 542 | |
| 543 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \ | |
| 544 output_ascii (FILE, P, SIZE) | |
| 545 | |
| 546 /* This is how to output an element of a case-vector that is absolute. */ | |
| 547 | |
| 548 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ | |
| 549 fprintf (FILE, "\t%sL_%d\n", TARGET_UNIX_ASM ? "" : ".word ", VALUE) | |
| 550 | |
| 551 /* This is how to output an element of a case-vector that is relative. | |
| 552 Don't define this if it is not supported. */ | |
| 553 | |
| 554 /* #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) */ | |
| 555 | |
| 556 /* This is how to output an assembler line | |
| 557 that says to advance the location counter | |
| 558 to a multiple of 2**LOG bytes. | |
| 559 | |
| 560 who needs this???? | |
| 561 */ | |
| 562 | |
| 563 #define ASM_OUTPUT_ALIGN(FILE,LOG) \ | |
| 564 switch (LOG) \ | |
| 565 { \ | |
| 566 case 0: \ | |
| 567 break; \ | |
| 568 case 1: \ | |
| 569 fprintf (FILE, "\t.even\n"); \ | |
| 570 break; \ | |
| 571 default: \ | |
| 572 gcc_unreachable (); \ | |
| 573 } | |
| 574 | |
| 575 #define ASM_OUTPUT_SKIP(FILE,SIZE) \ | |
| 576 fprintf (FILE, "\t.=.+ %#ho\n", (unsigned short)(SIZE)) | |
| 577 | |
| 578 /* This says how to output an assembler line | |
| 579 to define a global common symbol. */ | |
| 580 | |
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581 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \ |
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582 pdp11_asm_output_var (FILE, NAME, SIZE, ALIGN, true) |
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583 |
| 0 | 584 |
| 585 /* This says how to output an assembler line | |
| 586 to define a local common symbol. */ | |
| 587 | |
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588 #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN) \ |
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589 pdp11_asm_output_var (FILE, NAME, SIZE, ALIGN, false) |
| 0 | 590 |
| 591 /* Print a memory address as an operand to reference that memory location. */ | |
| 592 | |
| 593 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ | |
| 594 print_operand_address (FILE, ADDR) | |
| 595 | |
| 596 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ | |
| 597 ( \ | |
| 598 fprintf (FILE, "\tmov %s, -(sp)\n", reg_names[REGNO]) \ | |
| 599 ) | |
| 600 | |
| 601 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ | |
| 602 ( \ | |
| 603 fprintf (FILE, "\tmov (sp)+, %s\n", reg_names[REGNO]) \ | |
| 604 ) | |
| 605 | |
| 606 #define TRAMPOLINE_SIZE 8 | |
| 607 #define TRAMPOLINE_ALIGNMENT 16 | |
| 608 | |
| 609 /* there is no point in avoiding branches on a pdp, | |
| 610 since branches are really cheap - I just want to find out | |
| 611 how much difference the BRANCH_COST macro makes in code */ | |
| 111 | 612 #define BRANCH_COST(speed_p, predictable_p) pdp11_branch_cost () |
| 0 | 613 |
| 614 #define COMPARE_FLAG_MODE HImode | |
| 111 | 615 |
| 616 #define TARGET_HAVE_NAMED_SECTIONS false | |
| 617 | |
| 618 /* pdp11-unknown-aout target has no support of C99 runtime */ | |
| 619 #undef TARGET_LIBC_HAS_FUNCTION | |
| 620 #define TARGET_LIBC_HAS_FUNCTION no_c99_libc_has_function |