Mercurial > hg > CbC > CbC_gcc
annotate gcc/config/spu/spu.h @ 55:77e2b8dfacca gcc-4.4.5
update it from 4.4.3 to 4.5.0
| author | ryoma <e075725@ie.u-ryukyu.ac.jp> |
|---|---|
| date | Fri, 12 Feb 2010 23:39:51 +0900 |
| parents | 58ad6c70ea60 |
| children | f6334be47118 |
| rev | line source |
|---|---|
|
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parents:
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1 /* Copyright (C) 2006, 2007, 2008, 2009 Free Software Foundation, Inc. |
| 0 | 2 |
| 3 This file is free software; you can redistribute it and/or modify it under | |
| 4 the terms of the GNU General Public License as published by the Free | |
| 5 Software Foundation; either version 3 of the License, or (at your option) | |
| 6 any later version. | |
| 7 | |
| 8 This file is distributed in the hope that it will be useful, but WITHOUT | |
| 9 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 10 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 11 for more details. | |
| 12 | |
| 13 You should have received a copy of the GNU General Public License | |
| 14 along with GCC; see the file COPYING3. If not see | |
| 15 <http://www.gnu.org/licenses/>. */ | |
| 16 | |
| 17 | |
| 18 /* Run-time Target */ | |
| 19 #define TARGET_CPU_CPP_BUILTINS() spu_cpu_cpp_builtins(pfile) | |
| 20 | |
| 21 #define TARGET_VERSION fprintf (stderr, " (spu %s)", __DATE__); | |
| 22 | |
| 23 #define OVERRIDE_OPTIONS spu_override_options() | |
| 24 #define C_COMMON_OVERRIDE_OPTIONS spu_c_common_override_options() | |
| 25 | |
| 26 #define OPTIMIZATION_OPTIONS(level,size) \ | |
| 27 spu_optimization_options(level,size) | |
| 28 | |
| 29 #define INIT_EXPANDERS spu_init_expanders() | |
| 30 | |
| 31 extern int target_flags; | |
| 32 extern const char *spu_fixed_range_string; | |
| 33 | |
| 34 /* Which processor to generate code or schedule for. */ | |
| 35 enum processor_type | |
| 36 { | |
| 37 PROCESSOR_CELL, | |
| 38 PROCESSOR_CELLEDP | |
| 39 }; | |
| 40 | |
| 41 extern GTY(()) int spu_arch; | |
| 42 extern GTY(()) int spu_tune; | |
| 43 | |
| 44 /* Support for a compile-time default architecture and tuning. The rules are: | |
| 45 --with-arch is ignored if -march is specified. | |
| 46 --with-tune is ignored if -mtune is specified. */ | |
| 47 #define OPTION_DEFAULT_SPECS \ | |
| 48 {"arch", "%{!march=*:-march=%(VALUE)}" }, \ | |
| 49 {"tune", "%{!mtune=*:-mtune=%(VALUE)}" } | |
| 50 | |
| 51 /* Default target_flags if no switches specified. */ | |
| 52 #ifndef TARGET_DEFAULT | |
| 53 #define TARGET_DEFAULT (MASK_ERROR_RELOC | MASK_SAFE_DMA | MASK_BRANCH_HINTS \ | |
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54 | MASK_SAFE_HINTS | MASK_ADDRESS_SPACE_CONVERSION) |
| 0 | 55 #endif |
| 56 | |
| 57 | |
| 58 /* Storage Layout */ | |
| 59 | |
| 60 #define BITS_BIG_ENDIAN 1 | |
| 61 | |
| 62 #define BYTES_BIG_ENDIAN 1 | |
| 63 | |
| 64 #define WORDS_BIG_ENDIAN 1 | |
| 65 | |
| 66 #define BITS_PER_UNIT 8 | |
| 67 | |
| 68 /* GCC uses word_mode in many places, assuming that it is the fastest | |
| 69 integer mode. That is not the case for SPU though. We can't use | |
| 70 32 here because (of some reason I can't remember.) */ | |
| 71 #define BITS_PER_WORD 128 | |
| 72 | |
| 73 #define UNITS_PER_WORD (BITS_PER_WORD/BITS_PER_UNIT) | |
| 74 | |
| 75 /* We never actually change UNITS_PER_WORD, but defining this causes | |
| 76 libgcc to use some different sizes of types when compiling. */ | |
| 77 #define MIN_UNITS_PER_WORD 4 | |
| 78 | |
| 79 #define POINTER_SIZE 32 | |
| 80 | |
| 81 #define PARM_BOUNDARY 128 | |
| 82 | |
| 83 #define STACK_BOUNDARY 128 | |
| 84 | |
| 85 /* We want it 8-byte aligned so we can properly use dual-issue | |
| 86 instructions, which can only happen on an 8-byte aligned address. */ | |
| 87 #define FUNCTION_BOUNDARY 64 | |
| 88 | |
| 89 /* We would like to allow a larger alignment for data objects (for DMA) | |
| 90 but the aligned attribute is limited by BIGGEST_ALIGNMENT. We don't | |
| 91 define BIGGEST_ALIGNMENT as larger because it is used in other places | |
| 92 and would end up wasting space. (Is this still true?) */ | |
| 93 #define BIGGEST_ALIGNMENT 128 | |
| 94 | |
| 95 #define MINIMUM_ATOMIC_ALIGNMENT 128 | |
| 96 | |
| 97 /* Make all static objects 16-byte aligned. This allows us to assume | |
| 98 they are also padded to 16-bytes, which means we can use a single | |
| 99 load or store instruction to access them. Do the same for objects | |
| 100 on the stack. (Except a bug (?) allows some stack objects to be | |
| 101 unaligned.) */ | |
| 102 #define DATA_ALIGNMENT(TYPE,ALIGN) ((ALIGN) > 128 ? (ALIGN) : 128) | |
| 103 #define CONSTANT_ALIGNMENT(TYPE,ALIGN) ((ALIGN) > 128 ? (ALIGN) : 128) | |
| 104 #define LOCAL_ALIGNMENT(TYPE,ALIGN) ((ALIGN) > 128 ? (ALIGN) : 128) | |
| 105 | |
| 106 #define EMPTY_FIELD_BOUNDARY 32 | |
| 107 | |
| 108 #define STRICT_ALIGNMENT 1 | |
| 109 | |
| 110 /* symbol_ref's of functions are not aligned to 16 byte boundary. */ | |
| 111 #define ALIGNED_SYMBOL_REF_P(X) \ | |
| 112 (GET_CODE (X) == SYMBOL_REF \ | |
| 113 && (SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_ALIGN1) == 0 \ | |
| 114 && (! SYMBOL_REF_FUNCTION_P (X) \ | |
| 115 || align_functions >= 16)) | |
| 116 | |
| 117 #define PCC_BITFIELD_TYPE_MATTERS 1 | |
| 118 | |
| 119 #define MAX_FIXED_MODE_SIZE 128 | |
| 120 | |
| 121 #define STACK_SAVEAREA_MODE(save_level) \ | |
| 122 (save_level == SAVE_FUNCTION ? VOIDmode \ | |
| 123 : save_level == SAVE_NONLOCAL ? SImode \ | |
| 124 : Pmode) | |
| 125 | |
| 126 #define STACK_SIZE_MODE SImode | |
| 127 | |
| 128 | |
| 129 /* Type Layout */ | |
| 130 | |
| 131 #define INT_TYPE_SIZE 32 | |
| 132 | |
| 133 #define LONG_TYPE_SIZE 32 | |
| 134 | |
| 135 #define LONG_LONG_TYPE_SIZE 64 | |
| 136 | |
| 137 #define FLOAT_TYPE_SIZE 32 | |
| 138 | |
| 139 #define DOUBLE_TYPE_SIZE 64 | |
| 140 | |
| 141 #define LONG_DOUBLE_TYPE_SIZE 64 | |
| 142 | |
| 143 #define DEFAULT_SIGNED_CHAR 0 | |
| 144 | |
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145 #define STDINT_LONG32 0 |
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146 |
| 0 | 147 |
| 148 /* Register Basics */ | |
| 149 | |
| 150 /* 128-130 are special registers that never appear in assembly code. */ | |
| 151 #define FIRST_PSEUDO_REGISTER 131 | |
| 152 | |
| 153 #define FIXED_REGISTERS { \ | |
| 154 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 155 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 156 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 157 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 158 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 159 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 160 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 161 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 162 1, 1, 1 \ | |
| 163 } | |
| 164 | |
| 165 #define CALL_USED_REGISTERS { \ | |
| 166 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
| 167 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
| 168 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
| 169 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
| 170 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
| 171 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 172 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 173 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 174 1, 1, 1 \ | |
| 175 } | |
| 176 | |
| 177 #define CONDITIONAL_REGISTER_USAGE \ | |
| 178 spu_conditional_register_usage() | |
| 179 | |
| 180 | |
| 181 /* Values in Registers */ | |
| 182 | |
| 183 #define HARD_REGNO_NREGS(REGNO, MODE) \ | |
| 184 ((GET_MODE_BITSIZE(MODE)+MAX_FIXED_MODE_SIZE-1)/MAX_FIXED_MODE_SIZE) | |
| 185 | |
| 186 #define HARD_REGNO_MODE_OK(REGNO, MODE) 1 | |
| 187 | |
| 188 #define MODES_TIEABLE_P(MODE1, MODE2) \ | |
| 189 (GET_MODE_BITSIZE (MODE1) <= MAX_FIXED_MODE_SIZE \ | |
| 190 && GET_MODE_BITSIZE (MODE2) <= MAX_FIXED_MODE_SIZE) | |
| 191 | |
| 192 | |
| 193 /* Register Classes */ | |
| 194 | |
| 195 enum reg_class { | |
| 196 NO_REGS, | |
| 197 GENERAL_REGS, | |
| 198 ALL_REGS, | |
| 199 LIM_REG_CLASSES | |
| 200 }; | |
| 201 | |
| 202 /* SPU is simple, it really only has one class of registers. */ | |
| 203 #define IRA_COVER_CLASSES { GENERAL_REGS, LIM_REG_CLASSES } | |
| 204 | |
| 205 #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
| 206 | |
| 207 #define REG_CLASS_NAMES \ | |
| 208 { "NO_REGS", \ | |
| 209 "GENERAL_REGS", \ | |
| 210 "ALL_REGS" \ | |
| 211 } | |
| 212 | |
| 213 #define REG_CLASS_CONTENTS { \ | |
| 214 {0, 0, 0, 0, 0}, /* no regs */ \ | |
| 215 {0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x3}, /* general regs */ \ | |
| 216 {0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x3}} /* all regs */ | |
| 217 | |
| 218 #define REGNO_REG_CLASS(REGNO) (GENERAL_REGS) | |
| 219 | |
| 220 #define BASE_REG_CLASS GENERAL_REGS | |
| 221 | |
| 222 #define INDEX_REG_CLASS GENERAL_REGS | |
| 223 | |
| 224 #define REGNO_OK_FOR_BASE_P(regno) \ | |
| 225 ((regno) < FIRST_PSEUDO_REGISTER || (regno > LAST_VIRTUAL_REGISTER && reg_renumber[regno] >= 0)) | |
| 226 | |
| 227 #define REGNO_OK_FOR_INDEX_P(regno) \ | |
| 228 ((regno) < FIRST_PSEUDO_REGISTER || (regno > LAST_VIRTUAL_REGISTER && reg_renumber[regno] >= 0)) | |
| 229 | |
| 230 #define INT_REG_OK_FOR_INDEX_P(X,STRICT) \ | |
| 231 ((!(STRICT) || REGNO_OK_FOR_INDEX_P (REGNO (X)))) | |
| 232 #define INT_REG_OK_FOR_BASE_P(X,STRICT) \ | |
| 233 ((!(STRICT) || REGNO_OK_FOR_BASE_P (REGNO (X)))) | |
| 234 | |
| 235 #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS) | |
| 236 | |
| 237 #define CLASS_MAX_NREGS(CLASS, MODE) \ | |
| 238 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
| 239 | |
| 240 /* GCC assumes that modes are in the lowpart of a register, which is | |
| 241 only true for SPU. */ | |
| 242 #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \ | |
| 243 ((GET_MODE_SIZE (FROM) > 4 || GET_MODE_SIZE (TO) > 4) \ | |
| 244 && (GET_MODE_SIZE (FROM) < 16 || GET_MODE_SIZE (TO) < 16) \ | |
| 245 && GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO)) | |
| 246 | |
| 247 #define REGISTER_TARGET_PRAGMAS() do { \ | |
| 248 targetm.resolve_overloaded_builtin = spu_resolve_overloaded_builtin; \ | |
| 249 }while (0); | |
| 250 | |
| 251 | |
| 252 /* Frame Layout */ | |
| 253 | |
| 254 #define STACK_GROWS_DOWNWARD | |
| 255 | |
| 256 #define FRAME_GROWS_DOWNWARD 1 | |
| 257 | |
| 258 #define STARTING_FRAME_OFFSET (0) | |
| 259 | |
| 260 #define STACK_POINTER_OFFSET 32 | |
| 261 | |
| 262 #define FIRST_PARM_OFFSET(FNDECL) (0) | |
| 263 | |
| 264 #define DYNAMIC_CHAIN_ADDRESS(FP) plus_constant ((FP), -16) | |
| 265 | |
| 266 #define RETURN_ADDR_RTX(COUNT,FP) (spu_return_addr (COUNT, FP)) | |
| 267 | |
| 268 /* Should this be defined? Would it simplify our implementation. */ | |
| 269 /* #define RETURN_ADDR_IN_PREVIOUS_FRAME */ | |
| 270 | |
| 271 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG(Pmode, LINK_REGISTER_REGNUM) | |
| 272 | |
| 273 #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LINK_REGISTER_REGNUM) | |
| 274 | |
|
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parents:
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275 #define ARG_POINTER_CFA_OFFSET(FNDECL) \ |
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77e2b8dfacca
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276 (crtl->args.pretend_args_size - STACK_POINTER_OFFSET) |
| 0 | 277 |
| 278 | |
| 279 /* Stack Checking */ | |
| 280 | |
| 281 /* We store the Available Stack Size in the second slot of the stack | |
| 282 register. We emit stack checking code during the prologue. */ | |
| 283 #define STACK_CHECK_BUILTIN 1 | |
| 284 | |
| 285 | |
| 286 /* Frame Registers, and other registers */ | |
| 287 | |
| 288 #define STACK_POINTER_REGNUM 1 | |
| 289 | |
| 290 /* Will be eliminated. */ | |
| 291 #define FRAME_POINTER_REGNUM 128 | |
| 292 | |
| 293 /* This is not specified in any ABI, so could be set to anything. */ | |
| 294 #define HARD_FRAME_POINTER_REGNUM 127 | |
| 295 | |
| 296 /* Will be eliminated. */ | |
| 297 #define ARG_POINTER_REGNUM 129 | |
| 298 | |
| 299 #define STATIC_CHAIN_REGNUM 2 | |
| 300 | |
| 301 #define LINK_REGISTER_REGNUM 0 | |
| 302 | |
| 303 /* Used to keep track of instructions that have clobbered the hint | |
| 304 * buffer. Users can also specify it in inline asm. */ | |
| 305 #define HBR_REGNUM 130 | |
| 306 | |
| 307 #define MAX_REGISTER_ARGS 72 | |
| 308 #define FIRST_ARG_REGNUM 3 | |
| 309 #define LAST_ARG_REGNUM (FIRST_ARG_REGNUM + MAX_REGISTER_ARGS - 1) | |
| 310 | |
| 311 #define MAX_REGISTER_RETURN 72 | |
| 312 #define FIRST_RETURN_REGNUM 3 | |
| 313 #define LAST_RETURN_REGNUM (FIRST_RETURN_REGNUM + MAX_REGISTER_RETURN - 1) | |
| 314 | |
| 315 | |
| 316 /* Elimination */ | |
| 317 | |
| 318 #define ELIMINABLE_REGS \ | |
| 319 {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
| 320 {ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \ | |
| 321 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
| 322 {FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}} | |
| 323 | |
| 324 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ | |
| 325 ((OFFSET) = spu_initial_elimination_offset((FROM),(TO))) | |
| 326 | |
| 327 | |
| 328 /* Stack Arguments */ | |
| 329 | |
| 330 #define ACCUMULATE_OUTGOING_ARGS 1 | |
| 331 | |
| 332 #define REG_PARM_STACK_SPACE(FNDECL) 0 | |
| 333 | |
| 334 #define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1 | |
| 335 | |
| 336 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) (0) | |
| 337 | |
| 338 | |
| 339 /* Register Arguments */ | |
| 340 | |
| 341 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ | |
| 342 (spu_function_arg((CUM),(MODE),(TYPE),(NAMED))) | |
| 343 | |
| 344 #define CUMULATIVE_ARGS int | |
| 345 | |
| 346 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,FNDECL,N_NAMED_ARGS) \ | |
| 347 ((CUM) = 0) | |
| 348 | |
| 349 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ | |
| 350 ((CUM) += \ | |
| 351 (TYPE) && TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST ? 1 \ | |
| 352 : (MODE) == BLKmode ? ((int_size_in_bytes(TYPE)+15) / 16) \ | |
| 353 : (MODE) == VOIDmode ? 1 \ | |
| 354 : HARD_REGNO_NREGS(CUM,MODE)) | |
| 355 | |
| 356 | |
| 357 /* The SPU ABI wants 32/64-bit types at offset 0 in the quad-word on the | |
| 358 stack. 8/16-bit types should be at offsets 3/2 respectively. */ | |
| 359 #define FUNCTION_ARG_OFFSET(MODE, TYPE) \ | |
| 360 (((TYPE) && INTEGRAL_TYPE_P (TYPE) && GET_MODE_SIZE (MODE) < 4) \ | |
| 361 ? (4 - GET_MODE_SIZE (MODE)) \ | |
| 362 : 0) | |
| 363 | |
| 364 #define FUNCTION_ARG_PADDING(MODE,TYPE) upward | |
| 365 | |
| 366 #define PAD_VARARGS_DOWN 0 | |
| 367 | |
| 368 #define FUNCTION_ARG_REGNO_P(N) ((N) >= (FIRST_ARG_REGNUM) && (N) <= (LAST_ARG_REGNUM)) | |
| 369 | |
| 370 /* Scalar Return */ | |
| 371 | |
| 372 #define FUNCTION_VALUE(VALTYPE, FUNC) \ | |
| 373 (spu_function_value((VALTYPE),(FUNC))) | |
| 374 | |
| 375 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, FIRST_RETURN_REGNUM) | |
| 376 | |
| 377 #define FUNCTION_VALUE_REGNO_P(N) ((N) >= (FIRST_RETURN_REGNUM) && (N) <= (LAST_RETURN_REGNUM)) | |
| 378 | |
| 379 | |
| 380 /* Machine-specific symbol_ref flags. */ | |
| 381 #define SYMBOL_FLAG_ALIGN1 (SYMBOL_FLAG_MACH_DEP << 0) | |
| 382 | |
| 383 /* Aggregate Return */ | |
| 384 | |
| 385 #define DEFAULT_PCC_STRUCT_RETURN 0 | |
| 386 | |
| 387 | |
| 388 /* Function Entry */ | |
| 389 | |
| 390 #define EXIT_IGNORE_STACK 0 | |
| 391 | |
| 392 #define EPILOGUE_USES(REGNO) ((REGNO)==1 ? 1 : 0) | |
| 393 | |
| 394 | |
| 395 /* Profiling */ | |
| 396 | |
| 397 #define FUNCTION_PROFILER(FILE, LABELNO) \ | |
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398 spu_function_profiler ((FILE), (LABELNO)); |
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399 |
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400 #define NO_PROFILE_COUNTERS 1 |
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401 |
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402 #define PROFILE_BEFORE_PROLOGUE 1 |
| 0 | 403 |
| 404 | |
| 405 /* Trampolines */ | |
| 406 | |
| 407 #define TRAMPOLINE_SIZE (TARGET_LARGE_MEM ? 20 : 16) | |
| 408 | |
| 409 #define TRAMPOLINE_ALIGNMENT 128 | |
| 410 | |
| 411 /* Addressing Modes */ | |
| 412 | |
| 413 #define CONSTANT_ADDRESS_P(X) spu_constant_address_p(X) | |
| 414 | |
| 415 #define MAX_REGS_PER_ADDRESS 2 | |
| 416 | |
| 417 #define LEGITIMATE_CONSTANT_P(X) spu_legitimate_constant_p(X) | |
| 418 | |
| 419 | |
| 420 /* Costs */ | |
| 421 | |
| 422 #define BRANCH_COST(speed_p, predictable_p) spu_branch_cost | |
| 423 | |
| 424 #define SLOW_BYTE_ACCESS 0 | |
| 425 | |
| 426 #define MOVE_RATIO(speed) 32 | |
| 427 | |
| 428 #define NO_FUNCTION_CSE | |
| 429 | |
| 430 | |
| 431 /* Sections */ | |
| 432 | |
| 433 #define TEXT_SECTION_ASM_OP ".text" | |
| 434 | |
| 435 #define DATA_SECTION_ASM_OP ".data" | |
| 436 | |
| 437 #define JUMP_TABLES_IN_TEXT_SECTION 1 | |
| 438 | |
| 439 | |
| 440 /* PIC */ | |
| 441 #define PIC_OFFSET_TABLE_REGNUM 126 | |
| 442 | |
| 443 | |
| 444 /* File Framework */ | |
| 445 | |
| 446 #define ASM_APP_ON "" | |
| 447 | |
| 448 #define ASM_APP_OFF "" | |
| 449 | |
| 450 #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \ | |
| 451 do { fprintf (STREAM, "\t.file\t"); \ | |
| 452 output_quoted_string (STREAM, NAME); \ | |
| 453 fprintf (STREAM, "\n"); \ | |
| 454 } while (0) | |
| 455 | |
| 456 | |
| 457 /* Uninitialized Data */ | |
| 458 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ | |
| 459 ( fputs (".comm ", (FILE)), \ | |
| 460 assemble_name ((FILE), (NAME)), \ | |
| 461 fprintf ((FILE), ",%d\n", (ROUNDED))) | |
| 462 | |
| 463 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \ | |
| 464 ( fputs (".lcomm ", (FILE)), \ | |
| 465 assemble_name ((FILE), (NAME)), \ | |
| 466 fprintf ((FILE), ",%d\n", (ROUNDED))) | |
| 467 | |
| 468 | |
| 469 /* Label Output */ | |
| 470 #define ASM_OUTPUT_LABEL(FILE,NAME) \ | |
| 471 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0) | |
| 472 | |
| 473 #define ASM_OUTPUT_LABELREF(FILE, NAME) \ | |
| 474 asm_fprintf (FILE, "%U%s", default_strip_name_encoding (NAME)) | |
| 475 | |
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476 #define ASM_OUTPUT_SYMBOL_REF(FILE, X) \ |
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477 do \ |
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478 { \ |
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479 tree decl; \ |
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480 assemble_name (FILE, XSTR ((X), 0)); \ |
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481 if ((decl = SYMBOL_REF_DECL ((X))) != 0 \ |
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482 && TREE_CODE (decl) == VAR_DECL \ |
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483 && TYPE_ADDR_SPACE (TREE_TYPE (decl))) \ |
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484 fputs ("@ppu", FILE); \ |
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485 } while (0) |
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486 |
| 0 | 487 |
| 488 /* Instruction Output */ | |
| 489 #define REGISTER_NAMES \ | |
| 490 {"$lr", "$sp", "$2", "$3", "$4", "$5", "$6", "$7", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", \ | |
| 491 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", "$24", "$25", "$26", "$27", "$28", "$29", "$30", "$31", \ | |
| 492 "$32", "$33", "$34", "$35", "$36", "$37", "$38", "$39", "$40", "$41", "$42", "$43", "$44", "$45", "$46", "$47", \ | |
| 493 "$48", "$49", "$50", "$51", "$52", "$53", "$54", "$55", "$56", "$57", "$58", "$59", "$60", "$61", "$62", "$63", \ | |
| 494 "$64", "$65", "$66", "$67", "$68", "$69", "$70", "$71", "$72", "$73", "$74", "$75", "$76", "$77", "$78", "$79", \ | |
| 495 "$80", "$81", "$82", "$83", "$84", "$85", "$86", "$87", "$88", "$89", "$90", "$91", "$92", "$93", "$94", "$95", \ | |
| 496 "$96", "$97", "$98", "$99", "$100", "$101", "$102", "$103", "$104", "$105", "$106", "$107", "$108", "$109", "$110", "$111", \ | |
| 497 "$112", "$113", "$114", "$115", "$116", "$117", "$118", "$119", "$120", "$121", "$122", "$123", "$124", "$125", "$126", "$127", \ | |
| 498 "$vfp", "$vap", "hbr" \ | |
| 499 } | |
| 500 | |
| 501 #define PRINT_OPERAND(FILE, X, CODE) print_operand(FILE, X, CODE) | |
| 502 | |
| 503 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ | |
| 504 print_operand_address (FILE, ADDR) | |
| 505 | |
| 506 #define LOCAL_LABEL_PREFIX "." | |
| 507 | |
| 508 #define USER_LABEL_PREFIX "" | |
| 509 | |
| 510 | |
| 511 /* Dispatch Tables */ | |
| 512 | |
| 513 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ | |
| 514 fprintf (FILE, "\t.word .L%d-.L%d\n", VALUE, REL) | |
| 515 | |
| 516 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ | |
| 517 fprintf (FILE, "\t.word .L%d\n", VALUE) | |
| 518 | |
| 519 | |
| 520 /* Alignment Output */ | |
| 521 | |
| 522 #define ASM_OUTPUT_ALIGN(FILE,LOG) \ | |
| 523 do { if (LOG!=0) fprintf (FILE, "\t.align\t%d\n", (LOG)); } while (0) | |
| 524 | |
| 525 | |
| 526 /* Model costs for the vectorizer. */ | |
| 527 | |
| 528 /* Cost of conditional branch. */ | |
| 529 #ifndef TARG_COND_BRANCH_COST | |
| 530 #define TARG_COND_BRANCH_COST 6 | |
| 531 #endif | |
| 532 | |
| 533 /* Cost of any scalar operation, excluding load and store. */ | |
| 534 #ifndef TARG_SCALAR_STMT_COST | |
| 535 #define TARG_SCALAR_STMT_COST 1 | |
| 536 #endif | |
| 537 | |
| 538 /* Cost of scalar load. */ | |
| 539 #undef TARG_SCALAR_LOAD_COST | |
| 540 #define TARG_SCALAR_LOAD_COST 2 /* load + rotate */ | |
| 541 | |
| 542 /* Cost of scalar store. */ | |
| 543 #undef TARG_SCALAR_STORE_COST | |
| 544 #define TARG_SCALAR_STORE_COST 10 | |
| 545 | |
| 546 /* Cost of any vector operation, excluding load, store, | |
| 547 or vector to scalar operation. */ | |
| 548 #undef TARG_VEC_STMT_COST | |
| 549 #define TARG_VEC_STMT_COST 1 | |
| 550 | |
| 551 /* Cost of vector to scalar operation. */ | |
| 552 #undef TARG_VEC_TO_SCALAR_COST | |
| 553 #define TARG_VEC_TO_SCALAR_COST 1 | |
| 554 | |
| 555 /* Cost of scalar to vector operation. */ | |
| 556 #undef TARG_SCALAR_TO_VEC_COST | |
| 557 #define TARG_SCALAR_TO_VEC_COST 1 | |
| 558 | |
| 559 /* Cost of aligned vector load. */ | |
| 560 #undef TARG_VEC_LOAD_COST | |
| 561 #define TARG_VEC_LOAD_COST 1 | |
| 562 | |
| 563 /* Cost of misaligned vector load. */ | |
| 564 #undef TARG_VEC_UNALIGNED_LOAD_COST | |
| 565 #define TARG_VEC_UNALIGNED_LOAD_COST 2 | |
| 566 | |
| 567 /* Cost of vector store. */ | |
| 568 #undef TARG_VEC_STORE_COST | |
| 569 #define TARG_VEC_STORE_COST 1 | |
| 570 | |
| 571 /* Cost of vector permutation. */ | |
| 572 #ifndef TARG_VEC_PERMUTE_COST | |
| 573 #define TARG_VEC_PERMUTE_COST 1 | |
| 574 #endif | |
| 575 | |
| 576 | |
| 577 /* Misc */ | |
| 578 | |
| 579 #define CASE_VECTOR_MODE SImode | |
| 580 | |
| 581 #define MOVE_MAX 16 | |
| 582 | |
| 583 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) ((INPREC) <= 32 && (OUTPREC) <= (INPREC)) | |
| 584 | |
| 585 #define STORE_FLAG_VALUE -1 | |
| 586 | |
| 587 #define Pmode SImode | |
| 588 | |
| 589 #define FUNCTION_MODE QImode | |
| 590 | |
| 591 #define NO_IMPLICIT_EXTERN_C 1 | |
| 592 | |
| 593 #define HANDLE_PRAGMA_PACK_PUSH_POP 1 | |
| 594 | |
| 595 /* Canonicalize a comparison from one we don't have to one we do have. */ | |
| 596 #define CANONICALIZE_COMPARISON(CODE,OP0,OP1) \ | |
| 597 do { \ | |
| 598 if (((CODE) == LE || (CODE) == LT || (CODE) == LEU || (CODE) == LTU)) \ | |
| 599 { \ | |
| 600 rtx tem = (OP0); \ | |
| 601 (OP0) = (OP1); \ | |
| 602 (OP1) = tem; \ | |
| 603 (CODE) = swap_condition (CODE); \ | |
| 604 } \ | |
| 605 } while (0) | |
| 606 | |
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607 |
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608 /* Address spaces. */ |
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609 #define ADDR_SPACE_EA 1 |
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610 |
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611 /* Named address space keywords. */ |
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612 #define TARGET_ADDR_SPACE_KEYWORDS ADDR_SPACE_KEYWORD ("__ea", ADDR_SPACE_EA) |
| 0 | 613 |
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614 |
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615 /* Builtins. */ |
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616 |
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617 enum spu_builtin_type |
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618 { |
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619 B_INSN, |
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620 B_JUMP, |
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621 B_BISLED, |
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622 B_CALL, |
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623 B_HINT, |
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624 B_OVERLOAD, |
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625 B_INTERNAL |
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626 }; |
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627 |
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628 struct GTY(()) spu_builtin_description |
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629 { |
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630 int fcode; |
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631 int icode; |
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632 const char *name; |
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633 enum spu_builtin_type type; |
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634 |
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635 /* The first element of parm is always the return type. The rest |
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636 are a zero terminated list of parameters. */ |
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637 int parm[5]; |
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638 |
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639 tree fndecl; |
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640 }; |
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641 |
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642 extern struct spu_builtin_description spu_builtins[]; |
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643 |