Mercurial > hg > CbC > CbC_gcc
annotate gcc/config/pdp11/pdp11.h @ 145:1830386684a0
gcc-9.2.0
| author | anatofuz |
|---|---|
| date | Thu, 13 Feb 2020 11:34:05 +0900 |
| parents | 84e7813d76e9 |
| children |
| rev | line source |
|---|---|
| 0 | 1 /* Definitions of target machine for GNU compiler, for the pdp-11 |
| 145 | 2 Copyright (C) 1994-2020 Free Software Foundation, Inc. |
| 0 | 3 Contributed by Michael K. Gschwind (mike@vlsivie.tuwien.ac.at). |
| 4 | |
| 5 This file is part of GCC. | |
| 6 | |
| 7 GCC is free software; you can redistribute it and/or modify | |
| 8 it under the terms of the GNU General Public License as published by | |
| 9 the Free Software Foundation; either version 3, or (at your option) | |
| 10 any later version. | |
| 11 | |
| 12 GCC is distributed in the hope that it will be useful, | |
| 13 but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 15 GNU General Public License for more details. | |
| 16 | |
| 17 You should have received a copy of the GNU General Public License | |
| 18 along with GCC; see the file COPYING3. If not see | |
| 19 <http://www.gnu.org/licenses/>. */ | |
| 20 | |
| 21 #define CONSTANT_POOL_BEFORE_FUNCTION 0 | |
| 22 | |
| 23 /* check whether load_fpu_reg or not */ | |
|
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24 #define LOAD_FPU_REG_P(x) ((x) >= AC0_REGNUM && (x) <= AC3_REGNUM) |
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25 #define NO_LOAD_FPU_REG_P(x) ((x) == AC4_REGNUM || (x) == AC5_REGNUM) |
| 0 | 26 #define FPU_REG_P(x) (LOAD_FPU_REG_P(x) || NO_LOAD_FPU_REG_P(x)) |
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27 #define CPU_REG_P(x) ((x) <= PC_REGNUM) |
| 0 | 28 |
| 29 /* Names to predefine in the preprocessor for this target machine. */ | |
| 30 | |
| 31 #define TARGET_CPU_CPP_BUILTINS() \ | |
| 32 do \ | |
| 33 { \ | |
| 34 builtin_define_std ("pdp11"); \ | |
| 145 | 35 if (TARGET_INT16) \ |
| 36 builtin_define_with_int_value ("__pdp11_int", 16); \ | |
| 37 else \ | |
| 38 builtin_define_with_int_value ("__pdp11_int", 32); \ | |
| 39 if (TARGET_40) \ | |
| 40 builtin_define_with_int_value ("__pdp11_model", 40); \ | |
| 41 else if (TARGET_45) \ | |
| 42 builtin_define_with_int_value ("__pdp11_model", 45); \ | |
| 43 else \ | |
| 44 builtin_define_with_int_value ("__pdp11_model", 10); \ | |
| 45 if (TARGET_FPU) \ | |
| 46 builtin_define ("__pdp11_fpu"); \ | |
| 47 if (TARGET_AC0) \ | |
| 48 builtin_define ("__pdp11_ac0"); \ | |
| 0 | 49 } \ |
| 50 while (0) | |
| 51 | |
| 52 | |
| 53 /* Generate DBX debugging information. */ | |
| 54 | |
|
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55 #define DBX_DEBUGGING_INFO |
| 0 | 56 |
| 57 #define TARGET_40_PLUS (TARGET_40 || TARGET_45) | |
| 58 #define TARGET_10 (! TARGET_40_PLUS) | |
| 59 | |
| 60 #define TARGET_UNIX_ASM_DEFAULT 0 | |
| 61 | |
| 131 | 62 /* "Dialect" just distinguishes between standard DEC mnemonics, which |
| 63 are also used by the GNU assembler, vs. Unix mnemonics and float | |
| 64 register names. So it is tied to the -munit-asm option, and treats | |
| 65 -mgnu-asm and -mdec-asm as equivalent (both are dialect zero). */ | |
| 0 | 66 #define ASSEMBLER_DIALECT (TARGET_UNIX_ASM ? 1 : 0) |
| 67 | |
| 68 | |
| 69 | |
| 70 /* TYPE SIZES */ | |
| 71 #define SHORT_TYPE_SIZE 16 | |
| 72 #define INT_TYPE_SIZE (TARGET_INT16 ? 16 : 32) | |
| 73 #define LONG_TYPE_SIZE 32 | |
| 74 #define LONG_LONG_TYPE_SIZE 64 | |
| 75 | |
| 131 | 76 /* In earlier versions, FLOAT_TYPE_SIZE was selectable as 32 or 64, |
| 77 but that conflicts with Fortran language rules. Since there is no | |
| 78 obvious reason why we should have that feature -- other targets | |
| 79 generally don't have float and double the same size -- I've removed | |
| 80 it. Note that it continues to be true (for now) that arithmetic is | |
| 81 always done with 64-bit values, i.e., the FPU is always in "double" | |
| 82 mode. */ | |
| 83 #define FLOAT_TYPE_SIZE 32 | |
| 0 | 84 #define DOUBLE_TYPE_SIZE 64 |
| 85 #define LONG_DOUBLE_TYPE_SIZE 64 | |
| 86 | |
| 87 /* machine types from ansi */ | |
| 131 | 88 #define SIZE_TYPE "short unsigned int" /* definition of size_t */ |
| 89 #define WCHAR_TYPE "short int" /* or long int???? */ | |
| 0 | 90 #define WCHAR_TYPE_SIZE 16 |
| 91 | |
| 131 | 92 #define PTRDIFF_TYPE "short int" |
| 0 | 93 |
| 94 /* target machine storage layout */ | |
| 95 | |
| 96 /* Define this if most significant bit is lowest numbered | |
| 97 in instructions that operate on numbered bit-fields. */ | |
| 98 #define BITS_BIG_ENDIAN 0 | |
| 99 | |
| 100 /* Define this if most significant byte of a word is the lowest numbered. */ | |
| 101 #define BYTES_BIG_ENDIAN 0 | |
| 102 | |
| 103 /* Define this if most significant word of a multiword number is first. */ | |
| 104 #define WORDS_BIG_ENDIAN 1 | |
| 105 | |
| 106 /* Define that floats are in VAX order, not high word first as for ints. */ | |
| 107 #define FLOAT_WORDS_BIG_ENDIAN 0 | |
| 108 | |
| 109 /* Width of a word, in units (bytes). | |
| 110 | |
| 111 UNITS OR BYTES - seems like units */ | |
| 112 #define UNITS_PER_WORD 2 | |
| 113 | |
| 114 /* This machine doesn't use IEEE floats. */ | |
| 115 /* Because the pdp11 (at least Unix) convention for 32-bit ints is | |
| 116 big endian, opposite for what you need for float, the vax float | |
| 117 conversion routines aren't actually used directly. But the underlying | |
| 118 format is indeed the vax/pdp11 float format. */ | |
| 119 extern const struct real_format pdp11_f_format; | |
| 120 extern const struct real_format pdp11_d_format; | |
| 121 | |
| 131 | 122 /* Maximum sized of reasonable data type -- DImode ...*/ |
| 0 | 123 #define MAX_FIXED_MODE_SIZE 64 |
| 124 | |
| 125 /* Allocation boundary (in *bits*) for storing pointers in memory. */ | |
| 126 #define POINTER_BOUNDARY 16 | |
| 127 | |
| 128 /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
| 129 #define PARM_BOUNDARY 16 | |
| 130 | |
| 131 /* Boundary (in *bits*) on which stack pointer should be aligned. */ | |
| 132 #define STACK_BOUNDARY 16 | |
| 133 | |
| 134 /* Allocation boundary (in *bits*) for the code of a function. */ | |
| 135 #define FUNCTION_BOUNDARY 16 | |
| 136 | |
| 137 /* Alignment of field after `int : 0' in a structure. */ | |
| 138 #define EMPTY_FIELD_BOUNDARY 16 | |
| 139 | |
| 140 /* No data type wants to be aligned rounder than this. */ | |
| 141 #define BIGGEST_ALIGNMENT 16 | |
| 142 | |
| 143 /* Define this if move instructions will actually fail to work | |
| 144 when given unaligned data. */ | |
| 145 #define STRICT_ALIGNMENT 1 | |
| 145 | 146 |
| 147 /* "HW_DIVIDE" actually means 64 by 32 bit divide. While some PDP11 | |
| 148 models have hardware divide, it is for 32 by 16 bits only, so we | |
| 149 call this platform "no hardware divide". */ | |
| 150 #define TARGET_HAS_NO_HW_DIVIDE 1 | |
| 0 | 151 |
| 152 /* Standard register usage. */ | |
| 153 | |
| 154 /* Number of actual hardware registers. | |
| 155 The hardware registers are assigned numbers for the compiler | |
| 156 from 0 to just below FIRST_PSEUDO_REGISTER. | |
| 157 All registers that the compiler knows about must be given numbers, | |
| 158 even those that are not normally considered general registers. | |
| 159 | |
| 160 we have 8 integer registers, plus 6 float | |
| 161 (don't use scratch float !) */ | |
| 162 | |
| 163 /* 1 for registers that have pervasive standard uses | |
| 164 and are not available for the register allocator. | |
| 165 | |
| 166 On the pdp, these are: | |
| 167 Reg 7 = pc; | |
| 168 reg 6 = sp; | |
| 169 reg 5 = fp; not necessarily! | |
| 170 */ | |
| 171 | |
| 172 #define FIXED_REGISTERS \ | |
| 173 {0, 0, 0, 0, 0, 0, 1, 1, \ | |
| 131 | 174 0, 0, 0, 0, 0, 0, 1, 1, \ |
| 145 | 175 1 } |
| 0 | 176 |
| 177 | |
| 178 | |
| 179 /* 1 for registers not available across function calls. | |
| 180 These must include the FIXED_REGISTERS and also any | |
| 181 registers that can be used without being saved. | |
| 182 The latter must include the registers where values are returned | |
| 183 and the register where structure-value addresses are passed. | |
| 184 Aside from that, you can include as many other registers as you like. */ | |
| 185 | |
| 186 /* don't know about fp */ | |
| 187 #define CALL_USED_REGISTERS \ | |
| 188 {1, 1, 0, 0, 0, 0, 1, 1, \ | |
| 131 | 189 0, 0, 0, 0, 0, 0, 1, 1, \ |
| 145 | 190 1 } |
| 0 | 191 |
| 192 | |
| 193 /* Specify the registers used for certain standard purposes. | |
| 194 The values of these macros are register numbers. */ | |
| 195 | |
| 196 /* Register in which static-chain is passed to a function. */ | |
| 197 /* ??? - i don't want to give up a reg for this! */ | |
| 198 #define STATIC_CHAIN_REGNUM 4 | |
| 199 | |
| 200 /* Define the classes of registers for register constraints in the | |
| 201 machine description. Also define ranges of constants. | |
| 202 | |
| 203 One of the classes must always be named ALL_REGS and include all hard regs. | |
| 204 If there is more than one class, another class must be named NO_REGS | |
| 205 and contain no registers. | |
| 206 | |
| 207 The name GENERAL_REGS must be the name of a class (or an alias for | |
| 208 another name such as ALL_REGS). This is the class of registers | |
| 209 that is allowed by "g" or "r" in a register constraint. | |
| 210 Also, registers outside this class are allocated only when | |
| 211 instructions express preferences for them. | |
| 212 | |
| 213 The classes must be numbered in nondecreasing order; that is, | |
| 214 a larger-numbered class must never be contained completely | |
| 215 in a smaller-numbered class. | |
| 216 | |
| 217 For any two classes, it is very desirable that there be another | |
| 218 class that represents their union. */ | |
| 219 | |
| 220 /* The pdp has a couple of classes: | |
| 221 | |
| 222 MUL_REGS are used for odd numbered regs, to use in 16-bit multiplication | |
| 223 (even numbered do 32-bit multiply) | |
| 224 GENERAL_REGS is all cpu | |
| 225 LOAD_FPU_REGS is the first four cpu regs, they are easier to load | |
| 226 NO_LOAD_FPU_REGS is ac4 and ac5, currently - difficult to load them | |
| 227 FPU_REGS is all fpu regs | |
| 131 | 228 CC_REGS is the condition codes (CPU and FPU) |
| 0 | 229 */ |
| 230 | |
| 131 | 231 enum reg_class |
| 232 { NO_REGS, | |
| 145 | 233 NOTR0_REG, |
| 234 NOTR1_REG, | |
| 235 NOTR2_REG, | |
| 236 NOTR3_REG, | |
| 237 NOTR4_REG, | |
| 238 NOTR5_REG, | |
| 239 NOTSP_REG, | |
| 131 | 240 MUL_REGS, |
| 241 GENERAL_REGS, | |
| 242 LOAD_FPU_REGS, | |
| 243 NO_LOAD_FPU_REGS, | |
| 244 FPU_REGS, | |
| 245 CC_REGS, | |
| 246 ALL_REGS, | |
| 247 LIM_REG_CLASSES }; | |
| 0 | 248 |
| 131 | 249 #define N_REG_CLASSES ((int) LIM_REG_CLASSES) |
| 0 | 250 |
| 251 /* have to allow this till cmpsi/tstsi are fixed in a better way !! */ | |
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252 #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true |
| 0 | 253 |
| 254 /* Give names of register classes as strings for dump file. */ | |
| 255 | |
| 131 | 256 #define REG_CLASS_NAMES \ |
| 257 { "NO_REGS", \ | |
| 145 | 258 "NOTR0_REG", \ |
| 259 "NOTR1_REG", \ | |
| 260 "NOTR2_REG", \ | |
| 261 "NOTR3_REG", \ | |
| 262 "NOTR4_REG", \ | |
| 263 "NOTR5_REG", \ | |
| 264 "SP_REG", \ | |
| 131 | 265 "MUL_REGS", \ |
| 266 "GENERAL_REGS", \ | |
| 267 "LOAD_FPU_REGS", \ | |
| 268 "NO_LOAD_FPU_REGS", \ | |
| 269 "FPU_REGS", \ | |
| 270 "CC_REGS", \ | |
| 271 "ALL_REGS" } | |
| 0 | 272 |
| 273 /* Define which registers fit in which classes. | |
| 274 This is an initializer for a vector of HARD_REG_SET | |
| 275 of length N_REG_CLASSES. */ | |
| 276 | |
| 131 | 277 #define REG_CLASS_CONTENTS \ |
| 278 { {0x00000}, /* NO_REGS */ \ | |
| 145 | 279 {0x000fe}, /* NOTR0_REG */ \ |
| 280 {0x000fd}, /* NOTR1_REG */ \ | |
| 281 {0x000fb}, /* NOTR2_REG */ \ | |
| 282 {0x000f7}, /* NOTR3_REG */ \ | |
| 283 {0x000ef}, /* NOTR4_REG */ \ | |
| 284 {0x000df}, /* NOTR5_REG */ \ | |
| 285 {0x000bf}, /* NOTSP_REG */ \ | |
| 286 {0x0002a}, /* MUL_REGS */ \ | |
| 287 {0x040ff}, /* GENERAL_REGS */ \ | |
| 131 | 288 {0x00f00}, /* LOAD_FPU_REGS */ \ |
| 289 {0x03000}, /* NO_LOAD_FPU_REGS */ \ | |
| 290 {0x03f00}, /* FPU_REGS */ \ | |
| 145 | 291 {0x18000}, /* CC_REGS */ \ |
| 292 {0x1ffff}} /* ALL_REGS */ | |
| 0 | 293 |
| 294 /* The same information, inverted: | |
| 295 Return the class number of the smallest class containing | |
| 296 reg number REGNO. This could be a conditional expression | |
| 297 or could index an array. */ | |
| 298 | |
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299 #define REGNO_REG_CLASS(REGNO) pdp11_regno_reg_class (REGNO) |
| 0 | 300 |
| 301 /* The class value for index registers, and the one for base regs. */ | |
| 302 #define INDEX_REG_CLASS GENERAL_REGS | |
| 303 #define BASE_REG_CLASS GENERAL_REGS | |
| 304 | |
| 145 | 305 /* Return TRUE if the class is a CPU register. */ |
| 306 #define CPU_REG_CLASS(CLASS) \ | |
| 307 (CLASS >= NOTR0_REG && CLASS <= GENERAL_REGS) | |
| 308 | |
| 0 | 309 /* Return the maximum number of consecutive registers |
| 310 needed to represent mode MODE in a register of class CLASS. */ | |
| 311 #define CLASS_MAX_NREGS(CLASS, MODE) \ | |
| 145 | 312 (CPU_REG_CLASS (CLASS) ? \ |
| 313 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD): \ | |
| 314 1 \ | |
| 315 ) | |
| 0 | 316 |
| 317 /* Stack layout; function entry, exit and calling. */ | |
| 318 | |
| 319 /* Define this if pushing a word on the stack | |
| 320 makes the stack pointer a smaller address. */ | |
| 111 | 321 #define STACK_GROWS_DOWNWARD 1 |
| 0 | 322 |
| 323 /* Define this to nonzero if the nominal address of the stack frame | |
| 324 is at the high-address end of the local variables; | |
| 325 that is, each additional local variable allocated | |
| 326 goes at a more negative offset in the frame. | |
| 327 */ | |
| 328 #define FRAME_GROWS_DOWNWARD 1 | |
| 329 | |
| 131 | 330 #define PUSH_ROUNDING(BYTES) pdp11_push_rounding (BYTES) |
| 0 | 331 |
| 332 /* current_first_parm_offset stores the # of registers pushed on the | |
| 333 stack */ | |
| 334 extern int current_first_parm_offset; | |
| 335 | |
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336 /* Offset of first parameter from the argument pointer register value. */ |
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337 #define FIRST_PARM_OFFSET(FNDECL) 0 |
| 0 | 338 |
| 339 /* Define how to find the value returned by a function. | |
| 340 VALTYPE is the data type of the value (as a tree). | |
| 341 If the precise function being called is known, FUNC is its FUNCTION_DECL; | |
| 342 otherwise, FUNC is 0. */ | |
| 343 #define BASE_RETURN_VALUE_REG(MODE) \ | |
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344 (FLOAT_MODE_P (MODE) ? AC0_REGNUM : RETVAL_REGNUM) |
| 0 | 345 |
| 346 /* 1 if N is a possible register number for function argument passing. | |
| 347 - not used on pdp */ | |
| 348 | |
| 349 #define FUNCTION_ARG_REGNO_P(N) 0 | |
| 350 | |
| 351 /* Define a data type for recording info about an argument list | |
| 352 during the scan of that argument list. This data type should | |
| 353 hold all necessary information about the function itself | |
| 354 and about the args processed so far, enough to enable macros | |
| 355 such as FUNCTION_ARG to determine where the next arg should go. | |
| 356 | |
| 357 */ | |
| 358 | |
| 359 #define CUMULATIVE_ARGS int | |
| 360 | |
| 361 /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
| 362 for a call to a function whose data type is FNTYPE. | |
| 363 For a library call, FNTYPE is 0. | |
| 364 | |
| 365 ...., the offset normally starts at 0, but starts at 1 word | |
| 366 when the function gets a structure-value-address as an | |
| 367 invisible first argument. */ | |
| 368 | |
| 369 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \ | |
| 370 ((CUM) = 0) | |
| 371 | |
| 372 /* Output assembler code to FILE to increment profiler label # LABELNO | |
| 373 for profiling a function entry. */ | |
| 374 | |
| 145 | 375 #define FUNCTION_PROFILER(FILE, LABELNO) |
| 0 | 376 |
| 377 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, | |
| 378 the stack pointer does not matter. The value is tested only in | |
| 379 functions that have frame pointers. | |
| 380 No definition is equivalent to always zero. */ | |
| 381 | |
| 382 #define EXIT_IGNORE_STACK 1 | |
| 383 | |
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384 /* Definitions for register eliminations. |
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385 |
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386 This is an array of structures. Each structure initializes one pair |
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387 of eliminable registers. The "from" register number is given first, |
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388 followed by "to". Eliminations of the same "from" register are listed |
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389 in order of preference. |
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390 |
| 145 | 391 There are two registers that can be eliminated on the pdp11. The |
| 392 arg pointer can be replaced by the frame pointer; the frame pointer | |
| 393 can often be replaced by the stack pointer. */ | |
|
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394 |
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395 #define ELIMINABLE_REGS \ |
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396 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ |
| 145 | 397 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ |
| 398 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}} | |
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399 |
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400 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ |
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401 ((OFFSET) = pdp11_initial_elimination_offset ((FROM), (TO))) |
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402 |
| 0 | 403 |
| 404 /* Addressing modes, and classification of registers for them. */ | |
| 405 | |
| 406 #define HAVE_POST_INCREMENT 1 | |
| 407 | |
| 408 #define HAVE_PRE_DECREMENT 1 | |
| 409 | |
| 410 /* Macros to check register numbers against specific register classes. */ | |
| 411 | |
| 412 /* These assume that REGNO is a hard or pseudo reg number. | |
| 413 They give nonzero only if REGNO is a hard reg of the suitable class | |
| 414 or a pseudo reg currently allocated to a suitable hard reg. | |
| 415 Since they use reg_renumber, they are safe only once reg_renumber | |
| 111 | 416 has been allocated, which happens in reginfo.c during register |
| 417 allocation. */ | |
| 0 | 418 |
| 419 #define REGNO_OK_FOR_BASE_P(REGNO) \ | |
|
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420 ((REGNO) <= PC_REGNUM || (unsigned) reg_renumber[REGNO] <= PC_REGNUM || \ |
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421 (REGNO) == ARG_POINTER_REGNUM || (REGNO) == FRAME_POINTER_REGNUM) |
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422 |
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423 #define REGNO_OK_FOR_INDEX_P(REGNO) REGNO_OK_FOR_BASE_P (REGNO) |
| 0 | 424 |
| 425 /* Now macros that check whether X is a register and also, | |
| 426 strictly, whether it is in a specified class. | |
| 427 */ | |
| 428 | |
| 429 | |
| 430 | |
| 431 /* Maximum number of registers that can appear in a valid memory address. */ | |
| 432 | |
| 433 #define MAX_REGS_PER_ADDRESS 1 | |
| 434 | |
| 435 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx | |
| 436 and check its validity for a certain class. | |
| 437 We have two alternate definitions for each of them. | |
| 438 The usual definition accepts all pseudo regs; the other rejects | |
| 439 them unless they have been allocated suitable hard regs. | |
| 440 The symbol REG_OK_STRICT causes the latter definition to be used. | |
| 441 | |
| 442 Most source files want to accept pseudo regs in the hope that | |
| 443 they will get allocated to the class that the insn wants them to be in. | |
| 444 Source files for reload pass need to be strict. | |
| 445 After reload, it makes no difference, since pseudo regs have | |
| 446 been eliminated by then. */ | |
| 447 | |
| 448 #ifndef REG_OK_STRICT | |
| 449 | |
| 450 /* Nonzero if X is a hard reg that can be used as an index | |
| 451 or if it is a pseudo reg. */ | |
| 452 #define REG_OK_FOR_INDEX_P(X) (1) | |
| 453 /* Nonzero if X is a hard reg that can be used as a base reg | |
| 454 or if it is a pseudo reg. */ | |
| 455 #define REG_OK_FOR_BASE_P(X) (1) | |
| 456 | |
| 457 #else | |
| 458 | |
| 459 /* Nonzero if X is a hard reg that can be used as an index. */ | |
| 460 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) | |
| 461 /* Nonzero if X is a hard reg that can be used as a base reg. */ | |
| 462 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) | |
| 463 | |
| 464 #endif | |
| 465 | |
| 466 /* Specify the machine mode that this machine uses | |
| 467 for the index in the tablejump instruction. */ | |
| 468 #define CASE_VECTOR_MODE HImode | |
| 469 | |
| 470 /* Define this if a raw index is all that is needed for a | |
| 471 `tablejump' insn. */ | |
| 472 #define CASE_TAKES_INDEX_RAW | |
| 473 | |
| 474 /* Define this as 1 if `char' should by default be signed; else as 0. */ | |
| 475 #define DEFAULT_SIGNED_CHAR 1 | |
| 476 | |
| 477 /* Max number of bytes we can move from memory to memory | |
| 478 in one reasonably fast instruction. | |
| 479 */ | |
| 480 #define MOVE_MAX 2 | |
| 481 | |
| 131 | 482 /* Max number of insns to use for inline move rather than library |
| 483 call. */ | |
| 484 #define MOVE_RATIO(speed) 6 | |
| 485 | |
| 486 /* Nonzero if access to memory by byte is no faster than by word. */ | |
| 487 #define SLOW_BYTE_ACCESS 1 | |
| 0 | 488 |
| 489 /* Do not break .stabs pseudos into continuations. */ | |
| 490 #define DBX_CONTIN_LENGTH 0 | |
| 491 | |
| 492 /* Give a comparison code (EQ, NE etc) and the first operand of a COMPARE, | |
| 131 | 493 return the mode to be used for the comparison. */ |
| 494 | |
| 495 #define SELECT_CC_MODE(OP,X,Y) pdp11_cc_mode (OP, X, Y) | |
| 0 | 496 |
| 131 | 497 /* Enable compare elimination pass. */ |
| 498 #undef TARGET_FLAGS_REGNUM | |
| 499 #define TARGET_FLAGS_REGNUM CC_REGNUM | |
| 500 | |
| 501 /* Specify the CC registers. TODO: is this for "type 1" CC handling only? */ | |
| 502 #undef TARGET_FIXED_CONDITION_CODE_REGS | |
| 503 #define TARGET_FIXED_CONDITION_CODE_REGS pdp11_fixed_cc_regs | |
| 0 | 504 |
| 505 /* Specify the machine mode that pointers have. | |
| 506 After generation of rtl, the compiler makes no further distinction | |
| 507 between pointers and any other objects of this machine mode. */ | |
| 508 #define Pmode HImode | |
| 509 | |
| 510 /* A function address in a call instruction | |
| 511 is a word address (for indexing purposes) | |
| 512 so give the MEM rtx a word's mode. */ | |
| 513 #define FUNCTION_MODE HImode | |
| 514 | |
| 515 /* Define this if addresses of constant functions | |
| 516 shouldn't be put through pseudo regs where they can be cse'd. | |
| 517 Desirable on machines where ordinary constants are expensive | |
| 518 but a CALL with constant address is cheap. */ | |
| 519 /* #define NO_FUNCTION_CSE */ | |
| 520 | |
| 521 | |
| 522 /* Control the assembler format that we output. */ | |
| 523 | |
| 524 /* Output to assembler file text saying following lines | |
| 525 may contain character constants, extra white space, comments, etc. */ | |
| 526 | |
| 527 #define ASM_APP_ON "" | |
| 528 | |
| 529 /* Output to assembler file text saying following lines | |
| 530 no longer contain unusual constructs. */ | |
| 531 | |
| 532 #define ASM_APP_OFF "" | |
| 533 | |
| 534 /* Output before read-only data. */ | |
| 535 | |
| 131 | 536 #define TEXT_SECTION_ASM_OP \ |
| 537 ((TARGET_DEC_ASM) ? "\t.psect\tcode,i,ro,con" : "\t.text") | |
| 0 | 538 |
| 539 /* Output before writable data. */ | |
| 540 | |
| 131 | 541 #define DATA_SECTION_ASM_OP \ |
| 542 ((TARGET_DEC_ASM) ? "\t.psect\tdata,d,rw,con" : "\t.data") | |
| 543 | |
| 544 /* Output before read-only data. Same as read-write data for non-DEC | |
| 545 assemblers because they don't know about .rodata. */ | |
| 546 | |
| 547 #define READONLY_DATA_SECTION_ASM_OP \ | |
| 548 ((TARGET_DEC_ASM) ? "\t.psect\trodata,d,ro,con" : "\t.data") | |
| 0 | 549 |
| 550 /* How to refer to registers in assembler output. | |
| 551 This sequence is indexed by compiler's hard-register-number (see above). */ | |
| 552 | |
| 553 #define REGISTER_NAMES \ | |
| 554 {"r0", "r1", "r2", "r3", "r4", "r5", "sp", "pc", \ | |
| 145 | 555 "ac0", "ac1", "ac2", "ac3", "ac4", "ac5", "ap", "cc", \ |
| 556 "fcc" } | |
| 0 | 557 |
| 558 /* Globalizing directive for a label. */ | |
| 131 | 559 #define GLOBAL_ASM_OP "\t.globl\t" |
| 0 | 560 |
| 131 | 561 /* The prefix to add to user-visible assembler symbols. For the DEC |
| 562 assembler case, this is not used. */ | |
| 0 | 563 |
| 564 #define USER_LABEL_PREFIX "_" | |
| 565 | |
| 131 | 566 /* Line separators. */ |
| 567 | |
| 568 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) \ | |
| 569 ((C) == '\n' || (!TARGET_DEC_ASM && (C) == ';')) | |
| 570 | |
| 0 | 571 /* This is how to store into the string LABEL |
| 572 the symbol_ref name of an internal numbered label where | |
| 573 PREFIX is the class of label and NUM is the number within the class. | |
| 574 This is suitable for output with `assemble_name'. */ | |
| 575 | |
| 131 | 576 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ |
| 577 pdp11_gen_int_label ((LABEL), (PREFIX), (NUM)) | |
| 578 | |
| 579 /* Emit a string. */ | |
| 0 | 580 |
| 581 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \ | |
| 582 output_ascii (FILE, P, SIZE) | |
| 583 | |
| 131 | 584 /* Print a label reference, with _ prefix if not DEC. */ |
| 585 | |
| 586 #define ASM_OUTPUT_LABELREF(STREAM, NAME) \ | |
| 587 pdp11_output_labelref ((STREAM), (NAME)) | |
| 588 | |
| 589 /* Equate a symbol to an expression. */ | |
| 590 | |
| 591 #define ASM_OUTPUT_DEF(STREAM, NAME, VALUE) \ | |
| 592 pdp11_output_def (STREAM, NAME, VALUE) | |
| 593 | |
| 594 /* Mark a reference to an external symbol. Needed for DEC assembler. */ | |
| 595 | |
| 596 #define ASM_OUTPUT_EXTERNAL(STREAM, DECL, NAME) \ | |
| 597 if (TARGET_DEC_ASM) \ | |
| 598 fprintf ((STREAM), "\t.globl\t%s\n", (NAME)) | |
| 599 | |
| 600 #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \ | |
| 601 if (TARGET_DEC_ASM) \ | |
| 602 fprintf ((STREAM), ".title\t%s\n", (NAME)) | |
| 603 | |
| 0 | 604 /* This is how to output an element of a case-vector that is absolute. */ |
| 605 | |
| 606 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ | |
| 131 | 607 pdp11_output_addr_vec_elt (FILE, VALUE) |
| 0 | 608 |
| 145 | 609 /* This is how to output an assembler line that says to advance the |
| 610 location counter to a multiple of 2**LOG bytes. Only values 0 and | |
| 611 1 should appear, but due to PR87795 larger values (which are not | |
| 612 supported) can also appear. So we treat all alignment of LOG >= 1 | |
| 613 as word (2 byte) alignment. | |
| 0 | 614 */ |
| 615 | |
| 616 #define ASM_OUTPUT_ALIGN(FILE,LOG) \ | |
| 145 | 617 if (LOG != 0) \ |
| 618 fprintf (FILE, "\t.even\n") | |
| 0 | 619 |
| 620 #define ASM_OUTPUT_SKIP(FILE,SIZE) \ | |
| 131 | 621 if (TARGET_DEC_ASM) \ |
| 145 | 622 fprintf (FILE, "\t.blkb\t%o\n", (SIZE) & 0xffff); \ |
| 131 | 623 else \ |
| 145 | 624 fprintf (FILE, "\t.=.+ %#o\n", (SIZE) & 0xffff); |
| 0 | 625 |
| 626 /* This says how to output an assembler line | |
| 627 to define a global common symbol. */ | |
| 628 | |
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629 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \ |
| 131 | 630 pdp11_asm_output_var (FILE, NAME, SIZE, ALIGN, true) |
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631 |
| 0 | 632 /* This says how to output an assembler line |
| 633 to define a local common symbol. */ | |
| 634 | |
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635 #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN) \ |
| 131 | 636 pdp11_asm_output_var (FILE, NAME, SIZE, ALIGN, false) |
| 0 | 637 |
| 638 /* Print a memory address as an operand to reference that memory location. */ | |
| 639 | |
| 640 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ | |
| 131 | 641 print_operand_address (FILE, ADDR) |
| 0 | 642 |
| 131 | 643 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ |
| 644 fprintf (FILE, "\tmov\t%s,-(sp)\n", reg_names[REGNO]) | |
| 0 | 645 |
| 131 | 646 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ |
| 647 fprintf (FILE, "\tmov\t(sp)+,%s\n", reg_names[REGNO]) | |
| 0 | 648 |
| 649 #define TRAMPOLINE_SIZE 8 | |
| 650 #define TRAMPOLINE_ALIGNMENT 16 | |
| 651 | |
| 131 | 652 #define BRANCH_COST(speed_p, predictable_p) 1 |
| 0 | 653 |
| 654 #define COMPARE_FLAG_MODE HImode | |
| 111 | 655 |
| 131 | 656 /* May be overridden by command option processing. */ |
| 111 | 657 #define TARGET_HAVE_NAMED_SECTIONS false |
| 658 | |
| 659 /* pdp11-unknown-aout target has no support of C99 runtime */ | |
| 660 #undef TARGET_LIBC_HAS_FUNCTION | |
| 661 #define TARGET_LIBC_HAS_FUNCTION no_c99_libc_has_function |